Rohm Co., Ltd.

Dainippon Screen Mfg. Co., Ltd.

Other

Hideki Hayashi

Kiyoshi Nishimura

Takaaki Fuchikami

Hiromi Uenoyama

Jun Muramoto

Yoshihiro Ikefuji

Hiroo Mochida

Takayuki Nakashima

Takashi Watanabe

Masaru Suzuki

Kozo Nakamura

Kenji Sugimoto

Masahiro Horie

Johji Mamiya

Toshio Hiroe

Tadashi Maegawa

Fujikazu Kitamura

Kumiko Akashika

Tsuyonobu Hatazawa

Hiroshi Tanase

Akihiko Hidaka

There is provided a liquid crystal display device including a first transparent substrate and a second transparent substrate pasted to each other via a liquid crystal sealing space in between, and provided with a predetermined display region. The first transparent substrate is integrally formed with an extension extending further than an edge of the second transparent substrate and longitudinally of the edge of the second transparent substrate. The extension is provided with at least one semiconductor chip having a longitudinal axis laid longitudinally of the extension. The extension is formed with an external connection terminal region including a plurality of terminals. The external connection terminal region does not overlap the semiconductor chip widthwise of the extension.

Method of making semiconductor chips for liquid crystal display device

A film thickness measurement apparatus () comprises an ellipsometer () for acquiring a polarization state of a film on a substrate () and a light interference unit () for acquiring spectral intensity of the film on the substrate (). In an optical system () of the light interference unit (), a light shielding pattern () is disposed in an aperture stop part (), and an illumination light from a light source () is emitted to the substrate () through the optical system (). A reflected light from the substrate () is guided to a light shielding pattern imaging part (), where an image of the light shielding pattern () is acquired. When the ellipsometer () performs a film thickness measurement, a tilt angle of the substrate () is obtained on the basis of the image of the light shielding pattern () and a light receiving unit () acquires a polarization state of the reflected light. An calculation part () obtains a thickness of a film with high precision from the polarization state of the reflected light by using the obtained tilt angle.

Apparatus for measuring film thickness formed on object, apparatus and method of measuring spectral reflectance of object, and apparatus and method of inspecting foreign material on object

There is provided a liquid crystal display device including a first transparent substrate and a second transparent substrate pasted to each other via a liquid crystal sealing space in between, and provided with a predetermined display region. The first transparent substrate is integrally formed with an extension extending further than an edge of the second transparent substrate and longitudinally of the edge of the second transparent substrate. The extension is provided with at least one semiconductor chip having a longitudinal axis laid longitudinally of the extension. The extension is formed with an external connection terminal region including a plurality of terminals. The external connection terminal region does not overlap the semiconductor chip longitudinally of the extension.

Liquid crystal display device and method of making semiconductor chips for liquid crystal display device

A liquid crystal display includes a compact LC panel. The LC panel includes transparent front and rear plates between which a liquid crystal layer is disposed. The rear plate has a projecting portion which avoids facing the front plate. The projecting portion carries a semiconductor chip for display control and two capacitors cooperating with the semiconductor chip. One of the capacitors, first capacitor, is located farther from the semiconductor chip than the other or second capacitor is. A first conductor is provided for connecting the first capacitor to the semiconductor chip, and a second conductor is provided for connecting the second capacitor to the same chip. The first and the second conductors are made substantially equal in electrical resistance.

Liquid crystal display having capacitors on a substrate with equal resistance conductors electrically connecting the capacitors to a chip

Planar light source device having polarization separator formed of two sheets with mating triangular prisms and different indices of refraction

A memory device has a ferroelectric memory cell block, which is connected via an input/output latch buffer to a data input terminal. The memory device also has a writing period forming circuit that forms a predetermined number of writing periods when writing of data is requested. During the thus formed plurality of writing periods, a control circuit controls the input/output latch buffer to write data to the memory cell block. Thus, a single request for writing of data causes writing of data to be repeated a plurality of times automatically.

Ferroelectric memory

For processing semiconductor substrates in a processing fluid, the substrates are introduced into a processing bath in which the processing fluid is filled. For holding the substrates in the process of introducing them into the processing bath, a holder having a pair of holding rods end a pair of aiding rods is prepared. A periodical linear array of grooves is formed on each rod. The rims of substrates are inserted into respective corresponding grooves on the rods so that the substrates do not touch respective side walls of the grooves in the aiding rod.

Apparatus for dipping substrates in processing fluid

A nonvolatile memory with a simple structure where recorded information can be read without destruction. A voltage is impressed between a control gate and a memory gate for writing. A ferroelectric layer is polarized in accordance with the direction of the impressed voltage. A control gate voltage to make channel is small when the ferroelectric layer is polarized with the control gate side being positive. Control gate voltage to make channel is large when the ferroelectric layer is polarized with the control gate side being negative. The reference voltage is impressed on the control gate for reading. A large drain current flows when the ferroelectric layer is polarized with a second polarization and a small drain current flows when the ferroelectric layer is polarized with a first polarization. Record information can be read by detecting the drain current. Polarization status of the ferroelectric is not destroyed in the reading operation.

Nonvolatile memory device

Nonvolatile memory with a simple structure where recorded information can be read without destruction: Voltage is impressed between control gate CG and memory gate MG at a writing operation. A ferroelectric layer 32 is polarized in accordance with the direction of the impressed voltage. The control gate voltage V.sub.CG to make a channel is low when the ferroelectric layer 32 is polarized with the control gate side being positive (polarized with second status). The control gate voltage V.sub.CG to make a channel is high when the ferroelectric layer 32 is polarized with the control gate side being negative (polarized with the first status). The reference voltage V.sub.ref is impressed to the control gate CG at the reading operation. A high drain current flows when the ferroelectric layer is polarized with the second status and low drain current flows when the ferroelectric layer is polarized with the first status. Recorded information can be read by detecting the drain current. With this reading operation, the polarization status is not destroyed.

Nonvolatile memory

Nonvolatile memory with simple structure where recorded information can be read without destroy: Voltage is impressed to control gate CG and channel is grounded at writing operation. Ferroelectric layer 32 is polarized in accordance with whether the applied voltage is larger than threshold voltage of the memory device. Control gate voltage V.sub.CC to make channel is little when the ferro-electric layer 32 is polarized with control gate side being positive (polarized with second status). Control gate voltage V.sub.CG to make channel is large when the ferroelectric layer 32 is polarized with control gate side being negative (polarized with first status). The reference voltage V.sub.ref is impressed to the control gate CG at reading operation. Large drain current flows when the ferroelectric layer is polarized with second status and little drain current flows when the ferroelectric layer is polarized with first status. Recorded information can be read by detecting the drain current. By this reading operation, polarization status is not destroyed.

Nonvolatile ferroelectric-semiconductor memory

A nonvolatile memory having a simple structure where recorded information can be read nondestructively. A voltage is applied between a control gate and a memory gate for writing. A ferroelectric layer is polarized in accordance with the polarization of the applied voltage. A control gate voltage, necessary to form a channel, is small when the ferroelectric layer is polarized with the control gate side negative (polarized with second polarization). The control gate voltage V.sub.cg necessary to form a channel is large when the ferroelectric layer is polarized with the control gate side positive (polarized with first polarization). The reference voltage is applied to the control gate for reading. A large drain current flows when the ferroelectric layer is polarized with the second polarization and a small drain current flows when the ferroelectric layer is polarized with the first polarization. Recorded information can be read by detecting the drain current. The polzarization state of the ferroelectric layer is not affected by the reading operation.

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Kyoto, Japan

Hideki Hayashi