Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Nippon Hoso' Kyokai

Other

Hidekazu Yamamoto

Shigeto Maegawa

Yasuhiro Kimura

Masao Yamawaki

Fumihiko Andoh

Yasuo Yamaguchi

Hiroshi Kawashima

Kiyohiko Sakakibara

Nobuyoshi Hattori

Hideki Naruoka

Kazuhito Matsukawa

Kazunori Miyakawa

Tadaharu Minato

Hajime Watanabe

Naoki Yutani

Naofumi Murata

Tomonori Yamaoka

Makoto Kobayashi

Masashi Ueno

Kazuhisa Taketoshi

Shigehisa Yamamoto

Yasukazu Mukogawa

Shiro Hine

Shinroku Maejima

Hiroshi Koya

Sotoju Asai

Yasutaka Nishioka

Satoshi Hirose

Hiroshi Shinyashiki

Morihiko Kume

Keiji Yamauchi

Katsu Tanaka

Masafumi Katsumata

A device and a device manufacturing process. First, a gettering layer is formed on the bottom surface of a silicon substrate. Gates having a MOS structure are then formed on the principal surface of the silicon substrate, and the gettering layer is removed. According to this manufacturing method, the formation of the gates having a MOS structure is performed such that the gettering layer getters dissolved oxygen present in the silicon substrate. This reduces the concentration of dissolved oxygen in the silicon substrate, resulting in improved device characteristics.

Semiconductor device including a gettering layer and manufacturing method therefor

A boat () has a recess () for supporting a laminated wafer (). The recess () has a first side surface (), a first bottom surface (), a second side surface (), a second bottom surface () and a third side surface (). Viewing from an upper surface of the boat (), the second bottom surface () is located in a position lower than the first bottom surface (). The laminated wafer () is mounted on the boat () in the state that a side surface of a first silicon wafer () is not in contact with the second bottom surface () of the recess () and a side surface of a second silicon wafer () is in contact with the first bottom surface () of the recess (). A second main surface () of the second silicon wafer () is in contact with the first side surface () of the recess () and a second main surface () of the first silicon wafer () is in contact with the third side surface () of the recess ().

Method of manufacturing SOI wafer

There are provided a method and an apparatus for evaluating a wafer configuration which can accurately evaluate a peripheral portion of a wafer as compared with the conventional SFQR or the like, which comprises: measuring a configuration of a wafer at positions with a prescribed space within a surface of the wafer; providing a first region (W ) within the wafer surface for calculating a reference line or a reference plane from the measured wafer configuration; calculating a reference line ( ) or a reference plane ( ) in the first region (W ); providing a second region (W ) to be evaluated outside the first region; extrapolating the reference line ( ) or reference plane ( ) to the second region (W ); analyzing a difference between the configuration of the second region and the reference line or reference plane within the second region; and calculating the analyzed difference as surface characteristics.

Wafer shape evaluating method and device producing method, wafer and wafer selecting method

A dicing lines is placed to overlap a slip created in a wafer, so that the slip extends within the dicing line.

Semiconductor wafer with a dicing line overlapping a defect

A substrate having a surface on which silicon is epitaxially grown; wherein the substrate is cut from an oxygen induced stacking fault generation area of a single crystal silicon rod grown by the Czochralski method.

Substrate for epitaxial growth

A method of manufacturing a semiconductor device including the steps of (a) forming an element isolation insulating film in an element isolation region of a SOI substrate of a stacked structure in which a semiconductor substrate, insulating layer, and semiconductor layer are stacked in this order, and (b) forming, in an element formation region of the SOI substrate, a transistor having a channel formation region selectively disposed in a main surface of the semiconductor layer, a gate structure on the channel formation region, and source/drain regions disposed is the main surface of the semiconductor layer and the adjacent channel formation region. The method also includes the step of (c) selectively growing, after said steps (a) and (b), a polycrystal semiconductor layer on the source/drain regions in a self-aligned manner, which is prescribed by the element isolation insulating film and the gate structure.

Semiconductor device

An object is to provide a method for processing a semiconductor substrate that can form an oxide film less prone to take in impurities affecting semiconductor characteristics on the surface. An RCA-cleaned semiconductor substrate is treated with diluted hydrofluoric acid (HF) to remove a native oxide film formed on the semiconductor substrate during the RCA cleaning process (step S,). For conditions of the treatment with diluted hydrofluoric acid, the concentration of hydrofluoric acid is about 50%, the ratio of hydrofluoric acid to pure water is 1:100, and the processing time is about one minute. Finally, the semiconductor substrate from which the native oxide film has been removed is stored in a clean atmosphere of oxygen for a predetermined time period to form an oxide film on the semiconductor substrate surface (step S,). The percentage of oxygen in the atmosphere of oxygen in the place for storage is about 20 to 100%.

Method for processing semiconductor substrate

A semiconductor device is provided which is capable of removing the heavy metal impurity in a SOI layer by gettering, and realizing an improvement in breakdown voltage and reliability. The semiconductor device comprises polysilicon regions functioning as a gettering site, which are selectively formed in a buried fashion, such as to make no contact with a gate insulating film and an element isolation insulating film, in a main surface of part of a SOI layer where a drain region and a source region are disposed; and contact holes being filled with polysilicon plug functioning as a gettering site, and extending through an interlayer insulating film between an upper surface of the interlayer insulating film and an upper surface of the polysilicon regions.

Semiconductor device with high gettering capability to impurity present in semiconductor layer of SOI substrate

A semiconductor device and a semiconductor storage device having an SOI structure and being enable sufficient gettering performance without imposing limitations on the freedom of design of an LSI circuit. A semiconductor device includes a semiconductor wafer of SOI structure which has a insulation layer and a silicon layer provided thereon, wherein the semiconductor wafer includes a plurality of element fabrication regions where semiconductor elements are fabricated, and a cutting region provided between the element fabrication regions. Gettering sites are formed in the cutting region by means of embedding a gettering member into grooves of predetermined depth.

Semiconductor device and semiconductor storage device

A semiconductor substrate with no reduction in the effective usage area and mechanical strength, and non-uniformity of the resist film thickness, and method of manufacturing and using the same are obtained. A detection mark for detecting the crystal orientation of a silicon wafer having an outer perimeter entirely of a circular contour is formed at a predetermined region of the silicon wafer. The crystal orientation of the semiconductor wafer can easily be detected with the outer perimeter still taking a circular contour. Therefore, various problems encountered in a conventional semiconductor substrate having an orientation flat or notch such as reduction in mechanical strength and effective usage area, and non-uniformity of the resist film can be circumvented.

Crystal orientation detectable semiconductor substrate, and methods of

An image sensor includes a photoelectric conversion element, a first MOS transistor having having a gate connected to the photoelectric conversion element, a second MOS transistor connected in series with the first transistor, and a third MOS transistor connected in series with the photoelectric conversion element, wherein the threshold voltage of the third MOS transistor is set higher than that of the second MOS transistor. In one embodiment, each of the pixels included in a second group of rows includes a photoelectric conversion element but without the first, second and third MOS transistors. A fourth MOS transistor connects a photoelectric conversion element of the second group to a photoelectric conversion element of a first group, the photoelectric conversion elements of the first group being part of pixels which contain first, second and third MOS transistors.

Solid state image sensor and a driving method thereof

A camera device having favorable multiplication characteristics (quantum efficiency) as well as improved sensitivity in a visible light region (especially the region on the red side) and a method of manufacturing the same are provided. The camera device includes a hole injection stop layer, a first photoelectric converting layer including selenium, a second photoelectric converting layer having spectral sensitivity characteristics which are different from those of the first photoelectric converting layer, a third photoelectric converting layer including selenium, and an electron injection stop layer. As a result, it is possible to improve multiplication characteristics (quantum efficiency) and to improve the sensitivity in the visible light region (especially the region on the red side) simultaneously.

Method of manufacturing a camera device

Camera device and method of manufacturing the same

A solid-state imaging device includes a semiconductor substrate in which an element part including a plurality of light responsive elements for generating charge carriers in response to incident light and a transfer part for transferring the charge carriers generated in each light responsive element are incorporated; a lens layer is disposed on the element part so that incident light is collected in the light responsive elements; and a light beam dispersion layer is disposed between the lens layer and the element part and includes two light transmissive layers having different refractive indices for dispersing light collected by the lens layer so that collected light entering respective light responsive elements is closer to a parallel beam than the incident light. By suppressing broadening of incident light in the semiconductor substrate at the light responsive elements, fewer charge carriers enter the CCD channel region and smear is reduced.

Solid-state imaging array including focusing elements

An improved photoelectric converter with reduced dark current includes a first electrode on a substrate covered by a semiconductor layer for photoelectric conversion. A second electrode is disposed on the semiconductor layer. An electron injection preventive layer is inserted between the semiconductor layer and the second electrode for preventing electrons from being injected from the second electrode into the semiconductor layer. The electron injection preventive layer is formed of a material satisfying the inequality:

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Tokyo, Japan

Hidekazu Yamamoto