Fujitsu Corporation

Fujitsu Semiconductor Limited

Fujitsu Microelectronics Limited

Hidekazu Sato

Kazuo Hashimi

Takae Sukegawa

Toshihiro Wakabayashi

Kousuke Suzuki

A semiconductor device fabrication method includes the steps of (a) forming a dielectric film on a semiconductor substrate; (b) etching the dielectric film by a dry process; and (c) supplying thermally decomposed atomic hydrogen onto the semiconductor substrate under a prescribed temperature condition, to remove a damaged layer produced in the semiconductor substrate due to the dry process.

Semiconductor device with inverted trapezoidal cross sectional profile in surface areas of substrate

A method of manufacturing a semiconductor device forms the semiconductor device in a device region of a semiconductor substrate simultaneously with forming a monitor semiconductor device that includes a gate electrode made of silicon containing material arranged on a gate insulating film in a monitor region of the semiconductor substrate, a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. The gate electrode is removed without removing a gate insulating film by applying pyrolysis hydrogen generated by pyrolysis on the monitor semiconductor device in the monitor region, and the gate insulating film is removed by a wet process. Impurities distribution of a silicon active region appearing after the gate electrode is removed is measured and fed back to a semiconductor manufacturing process.

Semiconductor wafer having W-shaped dummy metal filling section within monitor region

Method for evaluating impurity distribution under gate electrode without damaging silicon substrate

Semiconductor device and fabrication method thereof

A method of manufacturing a semiconductor device is provided which comprises: forming a first gate insulating film and a second gate insulating film in an active region of a semiconductor substrate; introducing an impurity of a first conductivity type into a first site where a first body region is to be formed, the first site being disposed under the first gate insulating film in the active region; forming a gate electrode on each of the first gate insulating film and the second gate insulating film; and introducing an impurity of the first conductivity type into the first site and a second site where a second body region is to be formed, the second site being disposed under the second gate insulating film in the active region, to form the first body region and the second body region, respectively.

Semiconductor device and method of manufacturing the same

By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this non-selective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650&#xb0; C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.

Semiconductor device and method for manufacturing the same

A method of stably and correctly evaluating impurities distribution under a gate of a semiconductor device without damaging a silicon substrate is disclosed. According to the evaluation method, a gate electrode made of a silicon containing material is removed without removing a gate insulating film by contacting pyrolysis hydrogen generated by pyrolysis to the semiconductor device that includes the gate electrode arranged on a semiconductor substrate through a gate insulating film, and a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. Further, a processed form of the gate is evaluated by observing a form of the gate insulating film that remains on the semiconductor substrate, the gate insulating film that remains on the semiconductor substrate is removed by a wet process, and the impurities distribution under the gate is measured and evaluated.

The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher than the concentration of carbon on the side bordering on the emitter layer, and upon the formation of the emitter layer, both boron and carbon are dispersed into a portion of the emitter layer that comes into contact with the base layer.

Heterobipolar transistor and method of fabricating the same

By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this nonselective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650&#xb0; C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.

Bipolar transistor

When a silicon-germanium mixed crystal layer is grown on a substrate by introducing a silicon source gas, a germanium source gas, a boron source gas, and a carbon source gas into a reaction chamber, the flow rate of the carbon source gas is set at 5 sccm or higher and the supply concentration of the carbon source gas is set as low as approximately 1.0% under the condition that the silicon-germanium mixed crystal layer is doped with carbon with a concentration of approximately 0.5%; resulting in, carbon with a concentration required to inhibit the diffusion of boron is doped into the layer and the concentration of carbon becomes equal to or higher than the concentration of boron in a region at any given depth.

Mixed crystal layer growing method and device, and semiconductor device

The present invention is to form a new desirable silicon nitride film of lower dielectric constant even by using common gases. More preferably, it should be well compatible with copper wiring if it is applied as an interlayer insulating film. A silicon nitride film comprising a ratio of N:Si of from 1.0-1.1: and a ratio of O:Si of from 0.1-0.15:1, and being formed through catalytic CVD method by using monosilane and ammonia, and thereby having a relative dielectric constant of less than 6. Also, a semiconductor device is provided employing the above silicon nitride film as an interlayer insulating film, favorably, between copper layers.

Growing community of inventors

Kawasaki, Japan

Hidekazu Sato