Hitachi, Ltd.

Elpida Memory, Inc.

Other

Hitachi Ulsi Systems Co., Ltd.

Hidekazu Goto

Yoshitaka Nakamura

Isamu Asano

Satoru Yamada

Hideo Aoki

Tsuyoshi Tamaru

Naoki Fukuda

Keizo Kawakita

Masayoshi Hirasawa

Hiroshi Sakuma

Masayuki Suzuki

Katsuhiko Tanaka

Nobuyoshi Kobayashi

Yoshitaka Tadaki

Toshihiro Sekiguchi

Takuya Fukuda

Masayoshi Saito

Natsuki Yokoyama

Yoshio Homma

Tsuyoshi Kawagoe

Keiji Kuroki

Tadashi Umezawa

Keizou Kawakita

Shinpei Iijima

Kenichi Koyanagi

Mitsuhiro Horikawa

Yoshikazu Ohira

A semiconductor device includes memory cells each having an MISFET for memory selection formed on one major surface of a semiconductor substrate and a capacitive element comprised of a lower electrode electrically connected at a bottom portion to one of a source and drain of the MISFET for memory selection via a first metal layer and an upper electrode formed on the lower electrode via a capacitive insulating film. The lower electrode has a thickness of 30 nm or greater at the bottom portion thereof. Sputtering with a high ionization ratio and high directivity, such as PCM, is adapted to the formation of the lower electrode to make only the bottom portion of a capacitor thicker.

Memory with memory cells that include a MIM type capacitor with a lower electrode made for reduced resistance at an interface with a metal film

After an upper electrode protective film is formed such that it is in a firm contact with ruthenium film of the upper electrode without damaging the ruthenium film, the upper electrode is etched, thereby, a MIM capacitor is obtained in which leak current is not increased due to oxidation of the ruthenium film of the upper electrode.

Manufacturing method of semiconductor device

The semiconductor device is formed according to the following steps. A TiN filmand a W filmare deposited on a silicon oxide filmincluding the inside of a via-holeby the CVD method and thereafter, the W filmand TiN filmon the silicon oxide filmare etched back to leave only the inside of the via-holeand form a plug. Then, a TiN film, Al-alloy film, and Ti filmare deposited on the silicon oxide filmincluding the surface of the plugby the sputtering method and thereafter, the Ti film, Al-alloy film, and TiN filmare patterned to form second-layer wiringsand

Semiconductor integrated circuit device having a conductive film which contains metal atoms bondable to a halogen element

Method for fabricating semiconductor integrated circuit

A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally etching silicide film at contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines formed when forming a first wiring layer are made of a laminate film having a titanium film, a titanium nitride film and a tungsten film, and a titanium silicide film containing nitrogen or oxygen is formed in contact areas of the bit lines and plugs. A titanium silicide film containing nitrogen or oxygen is also formed in contact areas of the first wiring layer and semiconductor substrate. The titanium silicide film may be replaced by silicide film containing nitrogen or oxygen, cobalt silicide film containing nitrogen or oxygen or cobalt silicide film.

Dynamic random access memory with improved contact arrangements

In a DRAM having a capacitor-over-bitline structure in which the capacitive insulating film of an information storing capacitive element C is formed of a high dielectric material such as Ta O (tantalum oxide) film , the portions of bit lines BL and first-layer interconnect lines to of a peripheral circuit which are in contact with at least an underlying silicon oxide film are formed of a W film, the bit lines BL and the interconnect lines to being arranged below the information storing capacitive element C, whereby the adhesion at the interface between the bit lines BL and the interconnect lines to and the silicon oxide film is improved in terms of high-temperature heat treatment to be performed when the capacitive insulating film is being formed.

Method of manufacturing a semiconductor integrated circuit device having a capacitor

The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.

The semiconductor device is formed according to the following steps. A TiN film and a W film are deposited on a silicon oxide film including the inside of a via-hole by the CVD method and thereafter, the W film and TiN film on the silicon oxide film are etched back to leave only the inside of the via-hole and form a plug . Then, a TiN film , Al-alloy film , and Ti film are deposited on the silicon oxide film including the surface of the plug by the sputtering method and thereafter, the Ti film , Al-alloy film , and TiN film are patterned to form second-layer wirings and

In a DRAM having a capacitor-over-bitline structure in which the capacitive insulating film of an information storing capacitive element C is formed of a high dielectric material such as Ta O (tantalum oxide) film the portions of bit lines BL and first-layer interconnect lines to of a peripheral circuit which are in contact with at least an underlying silicon oxide film are formed of a W film, the bit lines BL and the interconnect lines to being arranged below the information storing capacitive element C, whereby the adhesion at the interface between the bit lines BL and the interconnect lines to and the silicon oxide film is improved in terms of high-temperature heat treatment to be performed when the capacitive insulating film is being formed.

Method of manufacturing semiconductor integrated circuit device having a capacitor

A semiconductor integrated circuit device and a method of manufacturing such a device provides the advantages that undulations are prevented from being produced in the polycrystal silicon plugs in the bit line contact holes and that the undesired phenomenon of transversally etching the silicide film at the contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines BL formed at the time of forming a first wiring layer,is made of a laminate film having a titanium film,a titanium nitride film,and a tungsten film,and a titanium silicide film,containing nitrogen or oxygen is formed in the contact areas of the bit lines BL and the plugs,A titanium silicide film,containing nitrogen or oxygen is also formed in the contact areas of the first wiring layer,and the semiconductor substrate,The titanium silicide film,may be replaced by a tungsten silicide film containing nitrogen or oxygen, a cobalt silicide film containing nitrogen or oxygen or a cobalt silicide film.

Semiconductor integrated circuit device and method of manufacturing the same

In a DRAM having a capacitor-over-bitline structure in which the capacitive insulating film of an information storing capacitive element C is formed of a high dielectric material such as Ta,O,(tantalum oxide) film,the portions of bit lines BL and first-layer interconnect lines,to,of a peripheral circuit which are in contact with at least an underlying silicon oxide film,are formed of a W film, the bit lines BL and the interconnect lines,to,being arranged below the information storing capacitive element C, whereby the adhesion at the interface between the bit lines BL and the interconnect lines,to,and the silicon oxide film is improved in terms of high-temperature heat treatment to be performed when the capacitive insulating film is being formed.

Semiconductor integrated circuit device, and method of manufacturing the same

Semiconductor integrated circuit device in which a conductive film is

In forming a metal or metal silicide film by CVD, a fluoro-silane is used as a reaction gas, or a fluoro-silane is added to a source gas. Examples of the metal halide used in the present invention include fluorides and chlorides of tungsten, molybdenum, titanium, tantalum and niobium. Among them, fluorides of tungsten and molybdenum are more desirable particularly from the viewpoint of the availability of the deposited metal or metal silicide. It is preferred that the source gases, i.e. silane series gas and metal halide, be diluted with a carrier gas such as nitrogen, hydrogen, helium or argon, and this is also true of the fluoro-silane. The total pressure is preferably 0.01 to 10 Torr. The reaction temperature is desirably 200.degree. to 800.degree. C., more desirably 300.degree. to 500.degree. C. Plasma CVD instead of thermal CVD may be employed for the purpose of lowering the reaction temperature.

Refractory metal thin film having a particular step coverage factor and

In forming a metal or metal silicide film by CVD, a fluorosilane is used as a reaction gas, or a fluoro-silane is added to a source gas. Examples of the metal halide used in the present invention include fluorides and chlorides of tungsten, molybdenum, titanium, tantalum and niobium. Among them, fluorides of tungsten and molybdenum are more desirable particularly from the viewpoint of the availability of the deposited metal or metal silicide. It is preferred that the source gases, i.e. silane series gas and metal halide, be diluted with a carrier gas such as nitrogen, hydrogen, helium or argon, and this is also true of the fluoro-silane. The total pressure is preferably 0.01 to 10 Torr. The reaction temperature is desirably 200.degree. to 800.degree. C., more desirably 300.degree. to 500.degree. C. Plasma CVD instead of thermal CVD may be employed for the purpose of lowering the reaction temperature.

Growing community of inventors

Fussa, Japan

Hidekazu Goto