Fujitsu Corporation

Hideichi Endo

Hideki Kato

Chikara Tsuchiya

Kazuo Asakawa

Hideki Yoshizawa

Katsuya Ishikawa

Hiroki Iciki

Takashi Kawasaki

Hiromu Iwamoto

Yoshihide Sugiura

Toshiharu Matsuda

Hiroyuki Tsuzuki

An input analog data is applied to a plurality of neuron units in a time division manner. The analog input data is multiplied by digital weight data which can be changed in accordance with the data of the interconnection between units. The products of the time division analog input data and the digital weight data are added in an integrator. While the present sum of the products is output, the previous sum of the products is output simultaneously with the present data, thereby providing outputs in a pipe-line manner. When the output of the first neuron is produced, the second neuron in the same layer produces an output such that the output of the first layer is produced on the output analog bus in a time division manner. This analog neuron unit constitutes an intermediate layer and an output layer. One layer of neuron units can be repeatedly used by feeding back the output of one layer to the input of another layer, then the neuron system operates as a layered structure.

Neuron architecture

Neurocomputer with analog signal bus

Growing community of inventors

Kawasaki, Japan

Hideichi Endo