Oki Electric Industry Co., Ltd.

Electric Industry Co., Ltd.

Hidehisa Murayama

Hiroyuki Yamada

Kazuo Suto

In the case where the amplitude of the input signal is large, the duty ratio of the signal output from the last stage is greatly changed as compared with the input signal. In the present invention, in order to solve this problem, there is provided a cascade connection type inverter circuit in which the inverters at the odd-number stage is fed back to the input circuit of the inverter at the first stage via an impedance element, the circuit being characterized in that a switching means is connected for supplying to an input circuit of the inverter at the first stage a compensation current for compensating a disparity between the logical threshold value of the inverter at the first stage and the central voltage of the input signal when the voltage generated between the output terminal of the inverter at the first stage and the input terminal thereof exceeds a predetermined threshold value level.

Electrical circuit having inverters being serially connected together in a cascade

A signal deciding apparatus which can obtain a stable digital signal OUT irrespective of an amplitude and a duty ratio of an input signal IN is provided. The input signal IN is amplified by inverters ( to and ) and outputted as a digital signal OUT. A signal (S ) on the input side of the inverter ( ) is integrated by a time constant which is equal to a data period of the input signal IN by an integrator ( ) and supplied to a differential amplifier ( ). A signal (S ) on the output side of the inverter ( ) is integrated by a large time constant by an integrator ( ), a control voltage VC supplied from a control terminal ( ) is multiplexed to the integrated signal S and a resultant signal is sent to the differential amplifier ( ). An output signal of the differential amplifier ( ) is integrated by a resistor ( ) and a capacitor ( ) and its average level is fed back as a threshold voltage to the input side of the inverter ( ) through a resistor ( ) and multiplexed to the input signal IN. Thus, the digital signal OUT based on the duty ratio of the input signal IN is obtained.

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Tokyo, Japan

Hidehisa Murayama