Elpida Memory, Inc.

Ps4 Luxco S.a.r.l.

Hidehiro Takeshima

Yutaka Kagaya

Masamichi Ishihara

Kaoru Sonobe

Youkou Ito

Tomoko Goi

Shinei Sato

Tsutomu Kono

Masayuki Mino

A stacked semiconductor device is constructed by stacking in two levels: a lower semiconductor device having a wiring board, at least one semiconductor chip mounted on a first surface of the wiring board and having electrodes electrically connected to wiring by way of a connection means, an encapsulant composed of insulating plastic that covers the semiconductor chip and the connection means, a plurality of electrodes formed overlying the wiring of a second surface of the wiring board, and a plurality of linking interconnects each having a portion connected to the wiring of the first surface of the wiring board and another portion exposed on the surface of the encapsulant; and an upper semiconductor device in which each electrode overlies and is electrically connected to the exposed portions of each of the linking interconnects of the lower semiconductor device.

Stacked semiconductor device and fabrication method for same

A semiconductor device includes a wiring substrate having an insulating film formed on a surface thereof, a first semiconductor chip mounted on the wiring substrate, and a second semiconductor chip stacked and mounted on the first semiconductor chip so as to form an overhang portion. The insulating film is removed from an area of the wiring substrate that faces the overhang portion.

Semiconductor device and method of manufacturing the same

The present invention provides a semiconductor device which includes a semiconductor chip formed with an electrode pad on one surface thereof, a wiring board having a wiring pattern, with its one surface opposing the other surface of the semiconductor chip, a wire for electrically connecting the electrode pad of the semiconductor chip with the wiring pattern of the wiring board, an external terminal arranged on the other surface of the wiring board for electrical connection with the electrode pad through the wire and wiring pattern, and a sealant for fixing the semiconductor chip on one surface of the wiring board such that a hollow is formed between the other surface of the semiconductor chip and the one surface of the wiring board. The wiring board includes a throughhole communicating with the hollow.

Semiconductor device with hollow and throughhole and method of manufacturing same

A stacked semiconductor device is constructed by stacking in two levels: a lower semiconductor device having a wiring board, at least one semiconductor chip mounted on a first surface of the wiring board and having electrodes electrically connected to wiring by way of a connection means, an encapsulant composed of insulating plastic that covers the semiconductor chip and the connection means, a plurality of electrodes formed overlying the wiring of a second surface of the wiring board, and a plurality of linking interconnects each having a portion connected to the wiring of the first surface of the wiring board and another portion exposed on the surface of the encapsulant; and an upper semiconductor device in which each electrode overlies and is electrically connected to the exposed portions of each of the linking interconnects of the lower semiconductor device. The linking interconnects extend from the first surface of the wiring board to the side surfaces and upper surface of the encapsulant, and moreover, electrically connect with wiring of the wiring board that projects from the encapsulant.

A method of analyzing thermal stress includes calculating a distribution of the number of fillers in a composite integrally molded product by using physical property values of resin material containing fillers, and determining a coefficient of linear expansion of the resin material in the composite integrally molded product, that is used as an input condition of a thermal stress analysis, based on the distribution of the number of the fillers.

Method of analyzing thermal stress according to filling factor of filler in resin

Semiconductor deviceincludes wiring substrateincluding wiringand wiringin predetermined patterns, semiconductor chipsandwhich are mounted on wiring substratewith electrodes electrically connected to wiringof wiring substratevia wiresand, first sealing bodymade of an insulative resin which is formed on a part of wiring substrateand which covers semiconductor chipsandand wiresand, a plurality of connecting connection padsprovided on the top surface of first sealing body, a plurality of connecting wireswhich extend from the surface of wiring substrate, on which semiconductor chipsandare mounted, to the top surface of first sealing bodyvia the side surfaces of first sealing body, and which electrically connect wiringof wiring substrateand the plurality of connecting connection padsand second sealing bodymade of an insulative resin which covers the plurality of connecting wires

Growing community of inventors

Tokyo, Japan

Hidehiro Takeshima