Hitachi, Ltd.

Hitachi Denshi Kabushiki Kaisha

Hidehiro Kanada

Masuo Umemoto

Yoshizumi Eto

Seiichi Mita

Morito Rokuda

Morishi Izumita

Hitoshi Katayama

Yuichi Michikawa

Shinichi Miyazaki

Kazuyuki Takeshita

Yuuichi Michikawa

Masuo Umenoto

An original code series containing a synchronizing code is divided into code series, n in number so as to reduce an operation rate to 1/n (n is a positive integer). The detection of a synchronizing pattern is conducted on the basis of a fact that an original synchronizing pattern is transformed into any of patterns of n kinds based on the phase of division.

Circuit for detecting synchronizing code

A digital recording and reproducing system wherein luminance signals digitized and converted into the low speed signals and chrominance signals digitized at the time of recording are distributed among a plural number of channels and the signals of the plural number of channels are recorded respectively on a recording medium. At the time of the reproduction, the signals of the plural number of the channels are reproduced respectively from the recording medium and combined to form the luminance signals and the chrominance signals respectively. The luminance signals in the combined signal are converted into a high speed signal and output terminals for outputting dubbing signals from the system for dubbing the signals are led. The output side of a low speed-to-high speed converter and a channel combination circuit.

Digital signal recording and reproducing system having an interface for

Disclosed is an apparatus in which a picture signal is converted into digital signals and the digital signals are recorded into a recording medium, and which is suitable to perform dubbing of the digital signals reproduced from the recording medium. The apparatus employs the component method in which a luminance signal and chrominance signals constituting a picture signal are recorded separately from each other. According to the component method, the sampling frequency of the chrominance signal is set to be about 1/3-1/4 of that of the luminance signal, and therefore the recording/reproducing of a picture signal is carried out after the bit rate of the digital luminance signal is converted into a value equal to the bit rate of the digital chrominance signal. When digital dubbing is carried out between two apparatus each employing the component method, the taking-in and taking-out of signals to be dubbed are performed with respect to the digital luminance signals and digital chrominance signals having the same bit rate with each other.

Dubbing method and apparatus for digital recording reproducing apparatus

Number data affixed to individual digital data divided into a plurality of data blocks are sequentially read out from a recording medium to be used for determining the write-in positions of the digital data in a memory. For determining the write-in positions of the digital data, the number data of the next write-in position is estimated on the basis of the number data of the current write-in position. Judgment is made as to whether or not the number of times of continuous non-coincidence between the estimated number data and the successively read-out number data exceeds a predetermined setting, and, also judgment is made as to whether or not the number data read out each time falls within a predetermined range. Depending on the results of these judgments, one of the read-out number data and the estimated number data is selected to determine the next write-in position.

Digital data playback system

An apparatus for recording or reproducing codes resulting from digitalizing a picture signal on or from a video tape recorder includes a device for correcting code error produced due to interference in the course of recording or reproducing process. The pixel codes succeeding to one another in time are divided to high-order and low-order bit-blocks, respectively, wherein the high-order bits are used to constitute a pseudo pixel code which is then added with a pixel error correcting code. The pixel code consisting of the high-order bits is added with a bit error correcting code before being recorded. In reproduction, error correction can be realized at higher rate with the aid of the correction codes to improve the quality of reproduced picture.

Method and apparatus for generating error correction codes for digitized

An improved 8-8 mpping table system in digitally and magnetically recording video signals. Video signals coded into natural binary codes consisting of 8 bits are converted into different binary codes consisting of 8 bits constituted by patterns in which a continuous number of the 1's or the 0's does not exceed a predetermined number. In these codes, the continuous number of the 1's or the 0's is so limited that a maximum magnetization interval is reduced in magnetically recording the signals. Therefore, erroneous code is prevented from occurring in reproducing the signals.

Method of magnetically recording coded digital video signals and an

Parity bits (check bits) having a relatively high redundancy are added to upper significant bits of a digital signal, and parity bits having a relatively low redundancy, are added to the lower significant bits of the digital signal. The signal and the parity bits are recorded on a recording medium. The position of an error in a data block group of the lower bits reproduced from the recording medium is estimated as existing in a block in which the error is detected by the check of the data block group of the upper bits, and in the blocks preceding and subsequent to the former. This error correction method is most suitable for a recording and reproduction system of digital video signals.

Method of correcting errors of digital signals in the recording and

In the code modulation system for converting input data levels into an output signal in the form of code words by providing M input levels among N input levels assigned to input data with stairlike code weights on the basis of the input levels, (N-M) input levels which are the difference between said N input levels and said M input levels are respectively disposed near transition points where said stairlike code weight is changed, and the code weights are provided with hysteresis in the ascent process and the descent process of the input data level.

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Kodaira, Japan

Hidehiro Kanada