Semiconductor Energy Laboratory Co., Ltd.

Hideaki Shishido

Shunpei Yamazaki

Hiroyuki Miyake

Kouhei Toyotaka

Koji Kusunoki

Jun Koyama

Hajime Kimura

Ryo Arasawa

Daisuke Kubota

Hidetomo Kobayashi

Kei Takahashi

Takayuki Ikeda

Seiko Amano

Yoshiharu Hirakata

Takashi Nakagawa

Aya Miyazaki

Kiyotaka Kimura

Yusuke Kubota

Hisao Ikeda

Yasuhiro Jinbo

Atsushi Hirose

Makoto Kaneyasu

Shuichi Katsui

Osamu Fukuoka

Atsushi Umezaki

Kazunori Watanabe

Yoshifumi Tanada

Kensuke Yoshizumi

Ryota Tajima

Yasunori Yoshida

Kohei Yokoyama

Takaaki Nagata

Naoto Kusumoto

Masahiko Hayakawa

Tetsuji Ishitani

Yoshitaka Dozen

Kosei Nei

Seiko Inoue

Makoto Yanagisawa

Takayuki Abe

Shinichi Hirasa

Yasuyuki Arai

Daisuke Matsubayashi

Kazutaka Kuriki

Toshiyuki Isa

Keisuke Murayama

Yusuke Negoro

Mika Jikumaru

Takuya Kimishima

Satoshi Seo

Junichi Koezuka

Mitsuaki Osame

Kenichi Okazaki

Junya Maruyama

Yukinori Shima

Takeshi Osada

Susumu Kawashima

Yuji Iwaki

Daisuke Kurosaki

Masataka Nakada

Akio Yamashita

Ryota Fukumoto

Yuto Yakubo

Masahiro Katayama

Mayumi Mikami

Hirotada Oishi

Naoyuki Senda

Kentaro Hayashi

Satoru Saito

Tatsuya Sakuishi

Takeya Hirose

Hiromi Yanai

Hikaru Harada

A display device with high resolution is provided. A display device with low power consumption is provided. A display device with high luminance is provided. A display device with a high aperture ratio is provided. The display device includes a first wiring, a second wiring, a third wiring, and a pixel electrode. The first wiring extends in a first direction and is supplied with a source signal. The second wiring extends in a second direction intersecting the first direction and is supplied with a gate signal. The third wiring is supplied with a constant potential. The first wiring and the pixel electrode overlap with each other with the third wiring therebetween.

Display device

A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.

Display device, display module, and electronic device

An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel portion, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel portion and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, so that power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are formed to be stacked; therefore, the length of a wiring between the circuits can be shortened, and a low-power consumption operation and a high-speed operation can be performed.

Imaging device and electronic device

A display device with a narrow bezel is provided. The display device includes a pixel circuit and a driver circuit which are provided on the same plane. The driver circuit includes a selection circuit and a buffer circuit. The selection circuit includes a first transistor. The buffer circuit includes a second transistor. The first transistor has a region overlapping with the second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. One of a source and a drain of the second transistor is electrically connected to the pixel circuit.

Display device and electronic device

An object is to provide a light-emitting display device in which a pixel including a thin film transistor using an oxide semiconductor has a high aperture ratio. The light-emitting display device includes a plurality of pixels each including a thin film transistor and a light-emitting element. The pixel is electrically connected to a first wiring functioning as a scan line. The thin film transistor includes an oxide semiconductor layer over the first wiring with a gate insulating film therebetween. The oxide semiconductor layer is extended beyond the edge of a region where the first wiring is provided. The light-emitting element and the oxide semiconductor layer overlap with each other.

Light-emitting display device and electronic device including a first pixel and a second pixel and an oxide semiconductor region overlapping a light-emitting region

The present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. The imaging device is formed in such a manner that a first stacked body in which a plurality of devices are stacked and a second stacked body in which a plurality of devices are stacked are bonded to each other. For example, a pixel circuit, a driver circuit of a pixel, and the like can be provided in the first stacked body, and a reading circuit of the pixel circuit, a memory circuit, a driver circuit of the memory circuit, and the like can be provided in the second stacked body. With these structures, the imaging device which is small can be formed. Furthermore, wiring delay or the like can be prevented by stacking circuits, so that high-speed operation can be performed.

A display device with high luminance is provided. A pixel includes a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor. A gate of the first transistor is electrically connected to one electrode of the first capacitor and one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is electrically connected to one electrode of the second capacitor. One electrode of the second capacitor is electrically connected to a first wiring having a function of supplying a first potential. The other electrode of the second capacitor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor.

Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.

A display apparatus with low power consumption and high image quality is provided. The display apparatus includes a light-emitting element, a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. Preferably, one electrode of the light-emitting element is electrically connected to one of a source and a drain of the first transistor; the one electrode of the light-emitting element is electrically connected to one electrode of the first capacitor; a gate of the first transistor is electrically connected to one of a source and a drain of the second transistor; the gate of the first transistor is electrically connected to one electrode of the second capacitor; the other electrode of the second capacitor is electrically connected to the other electrode of the first capacitor; and the other electrode of the second capacitor is electrically connected to one of a source and a drain of the third transistor.

Display apparatus and electronic device

A semiconductor device including a capacitor whose charge capacity is increased while improving the aperture ratio is provided. Further, a semiconductor device which consumes less power is provided. A transistor which includes a light-transmitting semiconductor film, a capacitor in which a dielectric film is provided between a pair of electrodes, an insulating film which is provided over the light-transmitting semiconductor film, and a first light-transmitting conductive film which is provided over the insulating film are included. The capacitor includes the first light-transmitting conductive film which serves as one electrode, the insulating film which functions as a dielectric, and a second light-transmitting conductive film which faces the first light-transmitting conductive film with the insulating film positioned therebetween and functions as the other electrode. The second light-transmitting conductive film is formed over the same surface as the light-transmitting semiconductor film of the transistor and is a metal oxide film containing a dopant.

Semiconductor device

To provide a thin touch panel, a touch panel having a simple structure, a touch panel which can be easily incorporated into an electronic device, or a touch panel with a small number of components. The touch panel includes pixel electrodes arranged in a matrix, a plurality of signal lines, a plurality of scan lines, a plurality of first wirings extending in a direction parallel to the signal lines, and a plurality of second wirings extending in a direction parallel to the scan line. Part of the first wiring and part of the second wiring function as a pair of electrodes included in a touch sensor. The first wiring and the second wiring each have a stripe shape or form a mesh shape and are each provided between two adjacent pixel electrodes in a plan view.

Touch panel

A cost of a testing device is reduced. A structure of a testing device is simplified. A testing device capable of testing with higher accuracy is provided. A testing device () has a structure including a sending unit (), a receiving unit (), a control unit (), and a display (). The control unit includes a memory portion () and an arithmetic portion (). The sending unit has a function of generating a pulse signal for a probe () to generate an ultrasonic wave (). The receiving unit has a function of generating a first signal including a first analog data (D) on the basis of the input single input from the probe. The memory portion has a function of storing the first analog data. The arithmetic portion has a function of generating an image signal (S0) output to the display on the basis of the first analog data stored in the memory portion. The display has a function of displaying an image based on the image signal.

Testing device

A display device with a narrower frame can be provided. In the display device, a first layer, a second layer, and a third layer are provided to be stacked. The first layer includes a gate driver circuit and a data driver circuit, the second layer includes a demultiplexer circuit, and the third layer includes a display portion. In the display portion, pixels are arranged in a matrix, an input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and an output terminal of the demultiplexer circuit is electrically connected to some of the pixels. The gate driver circuit and the data driver circuit are provided to include a region overlapping some of the pixels. The gate driver circuit and the data driver circuit have a region where they are not strictly separated from each other and overlap each other. Five or more gate driver circuits and five or more data driver circuits can be provided.

A power storage system with excellent characteristics is provided. A power storage system with a high degree of safety is provided. A power storage system with less deterioration is provided. A storage battery with excellent characteristics is provided. The power storage system includes a neural network and a storage battery. The neural network includes an input layer, an output layer, and one or more hidden layers between the input layer and the output layer. The predetermined hidden layer is connected to the previous hidden layer or the previous input layer by a predetermined weight coefficient, and connected to the next hidden layer or the next output layer by a predetermined weight coefficient. In the storage battery, voltage and time at which the voltage is obtained are measured as one of sets of data. The sets of data measured at different times are input to the input layer and the operational condition of the storage battery is changed in accordance with a signal output from the output layer.

Neural network, power storage system, vehicle, and electronic device

An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

Pulse signal output circuit and shift register

Growing community of inventors

Kanagawa, Japan

Hideaki Shishido