Fujitsu Corporation

Fujitsu Vlsi Limited

Kyushu Fujitsu Electronics Limited

Hideaki Kawai

Takaaki Suzuki

Yoshihiro Takemae

Junji Ogawa

Masao Taguchi

Atsushi Hatakeyama

Hirohiko Mochizuki

Yukinori Kodama

Makoto Yanagisawa

Makoto Niimi

Masato Kaida

A semiconductor device includes a one-shot pulse generating circuit that generates a one-shot pulse having a predetermined pulse width at a rise or fall timing of a first clock signal, a cycle time measuring circuit that measures a cycle-time of the first clock signal from the one-shot pulse output from the one-shot pulse generating circuit, an internal clock generating circuit that generates a second clock signal based on the cycle time measured by the cycle time measuring circuit and the one-shot pulse output from the one-shot pulse generating circuit. The second clock signal has a cycle time identical to the first clock signal and has a rise or fall timing which is advanced by a specific time than that of the first clock signal, and the specific time is obtained by subtracting the cycle time of the first clock signal from a predetermined time, and a data output circuit that outputs data after a predetermined delay time from the rise or fall timing of the second clock signal.

Semiconductor device

A semiconductor device includes a one-shot pulse generating circuit that generates a one-shot pulse having a predetermined pulse width at a rise or fall timing of a first clock signal, a cycle time measuring circuit that measures a cycle time of the first clock signal from the one-shot pulse output from the one-shot pulse generating circuit, an internal clock generating circuit that generates a second clock signal based on the cycle time measured by the cycle time measuring circuit and the one-shot pulse output from the one-shot pulse generating circuit. The second clock signal has a cycle time identical to the first clock signal and has a rise or fall timing which is advanced by a specific time than that of the first clock signal, and the specific time is obtained by subtracting the cycle time of the first clock signal from a predetermined time, and a data output circuit that outputs data after a predetermined delay time from the rise or fall timing of the second clock signal.

A semiconductor device includes a one-shot pulse generating circuit that generates a one-shot pulse having a predetermined pulse width at a rise or fall timing of a first clock signal, a cycle time measuring circuit that measures a cycle time of the first clock signal from the one-shot pulse output from the one-shot pulse generating circuit, an internal clock generating circuit that generates a second clock signal based on the cycle time measured by the cycle time measuring circuit and the one-shot pulse output from the one-shot pulse generating circuit. The second clock signal has a cycle time identical to the first clock signal and has rise or fall timing which is advanced by a specific time than that of the first clock signal, and the specific time is obtained by subtracting the cycle time of the first clock signal from a predetermined time, and a data output circuit that outputs data after a predetermined delay time from the rise or fall timing of the second clock signal.

A semiconductor integrated circuit device is intended to prevent generation of an unnecessary leak current and hence to reduce power consumption. In the semiconductor integrated circuit device comprising: a current path which is formed between a predetermined power source terminal (or a predetermined power source pad) and a predetermined low potential power source line, a comparison circuit for comparing a node potential in the current path with a predetermined threshold voltage to thereby detect whether the voltage applied to said power source terminal is a voltage which is larger than an upper limit value of the terminal voltage, a signal generation circuit for generating a predetermined logic signal when the states of some designated control terminals satisfy a combination which is determined in advance, if the logic state of an output signal of said signal generation circuit is a predetermined logic state when said comparison circuit has detected that the voltage applied to the power source terminal is a voltage which is larger than an upper limit value of the terminal voltage, a circuit equipped with a predetermined function mounted on the chip is activated, the semiconductor integrated circuit device being characterized by comprising ON/OFF circuit for turning on and off said current path in accordance with the logic state of the output signal of said signal generation circuit.

Semiconductor integrated circuit device capable of reducing power

Growing community of inventors

Kawasaki, Japan

Hideaki Kawai