Hang Zhou Nano Core Chip Electronic Technology Co., Ltd.

Heyi Li

Hao Zhang

Le Ye

Ru Huang

Yuanxin Bao

Disclosed are a capacitance-to-digital conversion circuit, a capacitance-to-digital conversion method and an electronic chip. The capacitance-to-digital conversion circuit includes a first module, a comparator and an adaptive range-shift module; the first module includes a successive approximation unit, a first adder, a first digital-to-analog converter, a second adder, a third adder and an integrating unit. The first module further includes a second digital-to-analog converter connected to the third adder. The comparator, the adaptive range-shift module and the first adder are connected in series and the comparator is connected to the second digital-to-analog converter. By the present application, the adverse influence caused by the parasitic and interference is well avoided, the capacitance-to-digital conversion circuit may work in a harsh environment, the robustness of the circuit is significantly improved and the application range of the circuit is expanded.

Capacitance-to-digital conversion circuit, a capacitance-to-digital conversion method and an electronic chip

Disclosed are a power-aware method, a power-aware system and a converter. The power-aware method includes: receiving an input signal, wherein the input signal is a capacitive type, a resistive type, a voltage type or a current type, coarsely quantizing the input signal and outputting a numerical control code, the numerical control code indicating size information of the input signals, and turning on a corresponding number of power-consuming modules based on the numerical control code. By the power-aware method, the power-aware technical effect of a circuit may be provided and turned-on power-consuming modules always have the most suitable number regardless of the size of the input signals, which may ensure normal operation, and will not waste power consumption due to too many power-consuming modules and energy efficiency is improved as a whole.

Power-aware method, power-aware system and converter

Disclosed is a capacitive sensor chip based on a power-aware dynamic charge-domain amplifier array. The capacitive sensor chip is based on a zoom architecture and includes: an architecture having two or more stages for capacitive quantization in which a first stage performs coarse quantization using a successive approximation register (SAR) and a second stage performs fine quantization using a delta-sigma modulator, an amplifier in the capacitive sensor chip is powered by a floating capacitor, the floating capacitor is connected to a power supply to being charged and connected to the amplifier to power the amplifier by controlling switches; a first-order integrator of the delta-sigma modulator includes an amplifier array having a scale of N bits and 2amplifiers where N is a positive integer. By the capacitive sensor chip based on the power-aware dynamic charge-domain amplifier array, utilization efficiency of charges can be effectively improved, power consumption overheads nay be effectively saved, energy efficiency of a system is greatly improved and a driving capability of the subsequent-stage amplifier may be adaptively distributed according to the size of an input capacitance.

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Hangzhou, China

Heyi Li