Texas Instruments Corporation

Heungsoo Park

Patricia Beauregard Smith

Ping Jiang

Changming Jin

Phillip D Matz

Andrew McKerrow

Andrew J Mckerrow

A method of forming an integrated circuit including an organosilicate low dielectric constant insulating layer () formed of a substitution group depleted silicon oxide, such as an organosilicate glass, is disclosed. Subsequent plasma processing has been observed to break bonds in such an insulating layer (), resulting in molecules at the surface of the film with dangling bonds. Eventually, the damaged insulating layer () includes silanol molecules, which results in a degraded film. The disclosed method exposes the damaged insulating layer () to a thermally or plasma activated fluorine, hydrogen, or nitrogen, which reacts with the damaged molecules to form a passivated surface for the insulating layer ().

Chemical treatment of low-k dielectric films

Cleaning methods are disclosed for removing sidewall polymers from interconnect vias or trenches, wherein a wafer is exposed to a plasma comprising hydrogen and an inert gas in a plasma cleaning chamber following etch-stop etching.

Methods for polymer removal following etch-stop layer etch

In an integrated device, an etch is performed in an intermediate layer to form a via. The via is inspected using a scanning electron microscopy. The scanning electron microscopy detects a level of brightness associated with the via and a background shade. Whether the etch reached an etch-stop layer is determined by comparing the level of brightness associated with the via to the background shade.

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McKinney, TX, United States of America

Heungsoo Park