Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Hervé Fanet

Gaël Pillonnet

Ayrat Galisultanov

Yann Perrin

Marc Belleville

Philippe Basset

Hatem Samaali

Samer Houri

A capacitive logic cell with complementary control, including a variable-capacitance electromechanical device having a fixed part and a mobile part, the electromechanical device comprising first, second, third and fourth electrodes mounted on the fixed part, and a fifth electrode mounted on the mobile part, the first electrode being connected to a terminal for supplying a first input logic signal, the second electrode being connected to a terminal for supplying a second input logic signal, complementary to the first input logic signal, the third electrode being connected to a terminal for supplying a first output logic signal, and the fourth electrode being connected to a terminal for supplying a second output logic signal, complementary to the first output logic signal.

Capacitive logic cell with complementary control

An analog-to-digital converter for an adiabatic logic circuit, including at least one variable-capacitance cell, the cell including first and second main terminals and at least one control terminal insulated from its first and second main terminals and capable of receiving a control voltage to vary the capacitance between its first and second main terminals between a low value and a high value, wherein: the cell has its first main terminal coupled to a node of application of a variable periodic converter power supply voltage; the cell has its second main terminal coupled to a node for supplying a binary output signal of the converter; and the cell receives on its first control terminal an analog input voltage of the converter.

Analog-to-digital converter for a capacitive adiabatic logic circuit

A memory cell in capacitive logic, including a bistable system including a fixed element and a mobile element capable of taking one or the other of two stable positions with respect to the fixed element; a read device including a variable-capacitance capacitor including a first fixed electrode and a second mobile electrode rigidly fixed to the mobile element; and an electrically controllable write device for placing the mobile element in one or the other of its two stable positions.

Memory cells with capacitive logic based on electromechanically controlled variable-capacitance capacitors

A variable-capacitance capacitor having first and second electrodes mobile with respect to each other and third and fourth electrodes insulated from the first and second electrodes, capable of receiving a control signal to vary the relative position of the first and second electrodes in order to vary the capacitance between the first and second electrodes, the capacitor further including a system for controlling the position of the second electrode with respect to the first electrode, the system being arranged so that, for at least one relative position of the second electrode with respect to the first electrode, the position of the second electrode with respect to the first electrode is independent from the voltage between the first and second electrodes.

Electromechanical variable-capacitance capacitor with four electrodes

A logic cell, including a first capacitor connected between an application node for applying a supply voltage of the cell and a floating node for providing an output logic signal of the cell, and, connected in parallel with the first capacitor, an association in series of a second capacitor and a first variable-resistance element, the first variable-resistance element including a control electrode connected to an application node for applying a first input logic signal of the cell.

Capacitive logic cell

An adiabatic logic cell including a first MOS transistor coupling a node for applying a periodic variable supply voltage of the cell to a floating node for providing an output logic signal of the cell, wherein the first transistor is a dual-gate transistor including a front gate coupled to a node for applying an input logic signal of the cell, and a back gate coupled to a node for applying a first periodic variable bias voltage.

Adiabatic logic cell

A system including first and second electric or electronic circuits galvanically isolated from each other, and a coupling device coupling the first circuit to the second circuit, the coupling device including a variable-capacitance capacitor including first and second electrodes mobile with respect to each other, separated by an insulating region, and third and fourth electrodes electrically insulated from the first and second electrodes, capable of receiving a control signal to vary, by an electrostatic, electromagnetic, or piezoelectric actuation mechanism, the relative position of the first and second electrodes, to vary the capacitance between the first and second electrodes.

Galvanic isolation coupling device

A logic cell including a fixed assembly including a first electrode, a mobile assembly including a second electrode, and third, fourth, and fifth electrodes, wherein: the first, second, third, fourth, and fifth electrodes are insulated from one another; the first and second electrodes define a capacitor variable according to the position of the mobile assembly relative to the fixed assembly; the third electrode is connected to a node of application of a first logic input signal; the fourth electrode is connected to a node of application of a second logic input signal; the fifth electrode is connected to a reference node; and the position of the second electrode relative to the first electrode is a function of a combination of the first and second logic input signals.

The invention relates to a logic cell for an integrated circuit including at least one first variable-capacitance capacitor having first and second main electrodes separated by an insulating region, and a third control electrode capable of receiving a control voltage referenced to a reference node of the cell to vary the capacitance between the first and second main electrodes, the third electrode being coupled to a node of application of a first logic input signal of the cell, and the first and second electrodes being respectively coupled to a node of application of a cell power supply voltage and to a node for supplying a logic output signal of the cell.

Low power consumption logic cell

Adiabatic logic circuit having a first and a second inputs, a first and a second outputs and at least one supply and synchronization input (Phi), with this circuit comprising:

Low consumption logic circuit with mechanical switches

Logic circuit for integrated circuit comprising a variable supply voltage source, the variation of which comprises at least three successive phases, a first phase of increasing the voltage from a zero value to a nominal voltage, a second phase of maintaining the supply voltage at the nominal voltage and a third phase of reducing the supply voltage from the nominal voltage to a zero value, and at least two mechanical switches, said switches being microelectromechanical switches or nanoelectromechanical switches, and means of switching said switches.

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Revel, France

Hervé Fanet