International Business Machines Corporation

Hermann Schulze-Schoelling

Arnold Blum

Stephan R Richter

Fritz Irro

Horst Von Der Heyden

Guenter Knauft

Hellmuth R Geng

Helmut Schaal

Bernd Spaeth

In a data processing or transmission system which includes at least two synchronized clocks, for example--T-rings A and B which generate timing pulses Tai and Tbi for microinstruction execution, synchronism is checked by logic circuitry which receives pulses from the clocks. At least one of the pulses is delayed by one or more pulse period durations ti. The logic circuit output signal is used as an input to an indicator latch which is periodically set by an independent check oscillator or clock. In a preferred embodiment, the delays are introduced by master-slave flip-flops, which receive predetermined combinations of the T-signals and set by the independent check clock. Several delay latches and associated AND gates may be used for different logical combinations of delayed and undelayed T-signals. This scheme can easily be expanded to accommodate more than two synchronously operating clocks. These circuits check not only the instantaneous synchronism of the clocks, but also the correct sequencing of clock pulses. The check is also feasible if the T-ring counters are operated with a variable number of clock pulses per microinstruction execution.

Clock check circuits using delayed signals

An instruction execution modification mechanism is described for a digital data processor wherein multiple programs or tasks are performed in a concurrent manner by means of a time slice mechanism which causes the instructions from the different programs to be executed in an interleaved manner. Instructions from the different programs are executed during different successive time slice intervals. The instruction execution modification mechanism is responsive to the occurrences of various predetermined conditions in the data processing system for selectively modifying the normal execution of different ones of the instructions in different ones of the programs. To this end, there is provided a program list mechanism listing the modifiable programs, an instruction list mechanism listing the modifiable instructions and a modification storage mechanism for storing modification signals for the different instructions. If, during a given time slice interval, the program to be executed is on the modifiable program list and the instruction to be executed is on the modifiable instruction list and the appropriate condition is occurring in the data processing system, then the modification storage mechanism is enabled to send the modification signals for this instruction to the instruction execution unit for modifying the normal execution of this instruction.

Instruction execution modification mechanism for time slice controlled

A method for performing manual operations, such as address compare equal stop, single cycle alter, etc., in a time slice controlled microprocessor with microprogramming, which avoids stopping the processor clock when any of the programs requires a manual operation. This problem is solved by assigning the manual operations to a specific program, which for the other programs in the multiprogram environment executes the manual operations required.

Method of implementing manual operations

Growing community of inventors

Gaertringen, Germany

Hermann Schulze-Schoelling