Siemens Aktiengesellschaft

Hermann Kniepkamp

Walter Kellner

Dietrich Ristow

Jan-Erik Mueller

Guenter Winstel

Hartwig Bierhenke

A high resistance semiconductor substrate body with a thin low resistance active semiconductor layer thereon is generated by a method including the steps of subjecting the semiconductor substrate body to neutron bombardment to a degree which produces high resistance in the semiconductor body and whereby doping substances are generated in the substrate body by the thermal neutron bombardment. A thin low resistant active semiconductor layer is then generated on the substrate body by annealing, a surface of the semiconductor substrate body up to a selected depth by laser radiation or electron radiation such that the lattice deterioration which was caused by the neutron bombardment is eliminated but the doping which was generated by the transmutation of elements during neutron bombardment remains. The annealing can be undertaken only in selected regions on the surface of the semiconductor substrate body, thereby facilitating the construction of integrated circuit components thereon.

Method for making high resistance chromium-free semiconductor substrate

Very thin semiconductor chips are produced from a relatively large semiconductor substrate (such as gallium arsenide substrate) by generating a select pattern of crystallographic stress areas in a front surface of the substrate, as by mechanical scoring or application of a layer of material having a coefficient of thermal expansion significantly different from that of the semiconductor material in a pattern corresponding to the desired chip; applying an etch-resistant carrier member to such stressed front surface and etching the entire back surface of the substrate into a thickness less than 50 .mu.m, whereby the etching reaction penetrates into the region of the crystallographic stress and a division of the resultant eroded body into individual chips corresponding to the selected patterns occurs, with the chips being carried by said carrier member.

Method of manufacturing very thin semiconductor chips

A planar Schottky diode is disclosed which is inserted into a transmission line without disruption of characteristic impedance. The diode comprises a plurality of parallel finger-like projections forming Schottky contacts distributed over a width of the transmission line and also of ohmic contacts surrounding these projections but with a longer contact edge.

High cut-off frequency planar Schottky diode having a plurality of

The invention relates to a charge coupled element in which electrodes with blocking properties, arranged in series, are located on a semiconductor member of gallium arsenide. The semiconductor member has a semi-insulating gallium arsenide substrate on which an n-conductive layer of gallium arsenide is formed, which n-conductive layer has a charge carrier concentration of 1.multidot.10.sup.15 through 5.multidot.10.sup.17 cm.sup.-3. The electrodes form a blocking transition with this n-conductive layer.

Charge-coupled component formed on gallium arsenide

The invention relates to a semiconductor component element, in particular a Schottky field-effect transistor with a low series resistance, as well as a process for the production thereof. By means of a novel masking technique, it is possible for the channel region to be implanted as well as the source and drain regions, in a single implantation step. Only one photomask is necessary. By a novel masking arrangement, only a small fraction of the radiated ions get through to the region of the substrate where the channel is to be formed. This enables the formation of a Schottky contact where the channel will be formed. The source and drain regions are formed by allowing a much higher portion of the ions to reach such regions. This allows ohmic contacts to be formed on the source and drain. Thus, in the implantation of the dopant particles, regions are formed with different layer resistances in the semiconductor substrate. The thus produced field-effect transistor has low series resistance between the ohmic contacts and the active zones, without the Schottky contact being adversely influenced. Diodes and other active components may also be produced in a similar manner. A component element produced by the process is also disclosed which particularly finds use in the production of electronic circuits.

Fabrication of a semiconductor component element having a Schottky

A process for producing semiconductor luminescence diodes wherein an epitaxial layer is deposited on a monocrystal composed of a semi-insulating semiconductor material, a portion of the monocrystal at least up to the level of the epitaxial layer is removed to leave a border of monocrystal material and exposed epitaxial layer, and a dopant is diffused into this exposed epitaxial layer and the remaining border of the monocrystal material to produce a pn-junction in the epitaxial layer, and finally suitable electrodes are applied to the thus redoped zone of the epitaxial layer.

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Munich, Germany

Hermann Kniepkamp