Siemens Aktiengesellschaft

Infineon Technologies Ag

Heribert Geib

Stefan Prange

Franz Hofmann

Wolfgang Krautschneider

Till Schlösser

Bernard Hammer

J&uuml;rgen Pandel

Ivo Koren

Ulrich Ramacher

Wolfgang Raab

Erik De Man

A memory transistor and a selection transistor of an image sensor are connected in series and between a bit line (B) and a reference line (R). A gate electrode of the selection transistor is connected to a word line (W), which extends crosswise in relation to the bit line (B). A diode of the image sensor is switched between a gate electrode (G) of the memory transistor and a first source/drain area (S/D) of the memory transistor, which is connected to the selection transistor in such a way is polarized towards the first source/drain area (S/D) of the memory transistor and in the reverse direction. A photodiode of the image sensor is switched between a voltage connection and either the gate electrode (G) of the memory transistor or the first source/drain area (S/D) of the memory transistor in such a way that it is polarized towards the voltage connection and in the reverse direction.

Arrangement with image sensors

Method and device for the exposure-dependent noise correction in images sensor which can be addressed in lines and columns are converted into digital values and an offset voltage correction is carried out by a summer, a gain correction is carried out by a multiplier, and an exposure-dependent dark current correction is carried out by a further summer. Further, the coefficients that depend on the line number, the column number and the integration time, are determined by linear approximations. As a result, the fixed pattern noise (PFN) in CMOS image sensor can be efficiently suppressed with a relatively low outlay.

Method and device for the exposure-dependent noise correction in image sensors which can be addressed in lines and columns

For the purpose of bidirectional movement-compensated interpolation, it is proposed, when decoding compressed video sequences, completely to decode only one of the two reference frames. Only those respective picture areas of the other reference frame are decompressed which overlap with the picture area to be determined of the interpolated frame, taking account of a displacement corresponding to the movement compensation. As a result, a considerable reduction in the memory requirement of the decoding hardware is possible.

Method for decoding compressed video data with a reduced memory requirement

A filter configuration for a demodulated QAM signal has a first channel for a cosine demodulated component of the QAM signal, a second channel for a sine demodulated component of the QAM signal, a filter circuit, which receives the two signal components and for each signal component has one transfer function that is composed of terms in phase with this signal component and terms phase-shifted from it by &pgr;/2 and/or &minus;&pgr;/2. The circuit configuration also includes a cross branch for picking up signal portions from the respectively other channel that correspond to the phase-shifted terms of the transfer function. In a first state, the circuit configuration connects the input of the cross branch to the first channel and the output of the cross branch to the second channel, and in a second state connects the input of the cross branch to the second channel and the output of the cross branch to the first channel. A slope detector especially suitable for use with this filter configuration is also provided. The circuit configuration requires a reduced amount of circuitry and can be integrated on a small surface area of a semiconductor substrate.

Filter configuration and slope detector for quadrature amplitude modulated signals

The method is for coding and for decoding a video data stream, only one picture which is required for the reconstruction of interpolated pictures being stored in completely decompressed form during the coding or during the decoding of the video data stream. That part of a second basic picture (G,) which is required in decompressed form for the construction or reconstruction of an interpolated picture is temporarily decompressed in each case. A further possibility envisages storing a first basic picture (G,) and the second basic picture (G,) in compressed form and in each case temporarily decompressing only those regions which are required for the construction or reconstruction of an interpolated picture.

Process for decoding and coding a compressed video data stream with reduced memory requirements

A run length coding (RLC) is implemented in a coder/decoder unit (CD) in a forward path (VP) and a run length decoding (RLD) is implemented at the beginning of reconstruction in a reconstruction path for an internal reconstruction of the video data stream. As a result an added outlay seems to occur as compared to known methods. However, an interleaving of tasks that were successively implemented in previous methods is thereby enabled. A substantial reduction of the overall outlay compared to known procedures is achieved by the interleaving of the scan method (SV), quantizing (Q) and run length coding (RLC), run length decoding (RLD), inverse quantizing (IQ) and the inverse scan method (ISV).

Method and arrangement for coding and decoding a video data stream for

A storage element is provided in a circuit arrangement for latching one bit. A first MOS transistor (T1) is provided which, when a first control signal (S1) is present, switches an input signal corresponding to the bit to the input of the storage element. The storage element is provided with circuit elements by which an output signal at the output of the storage element is brought to a predetermined potential in dependence on the level of the input signal. The circuit arrangement is particularly suitable for constructing an address latch for DRAMs, particularly of the 16-M generation.

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Grafing, Germany

Heribert Geib