General Electric Company

Martin Marietta Corporation

Lockheed Martin Corporation

Herbert S Cole

Siegfried Aftergut

Robert J Wojnarowski

Theresa Ann Sitnik-Nieters

Wolfgang Daum

James Wilson Rose

Richard J Saia

Yung S Liu

Thomas Bert Gorczyca

Kevin Matthew Durocher

Raymond Albert Fillion

Ernest Wayne Balch

Ronald Frank Kolc

Anil Raj Duggal

Renato Guida

John H Lupinski

John L Henkes

Vikram Bidare Krishnamurthy

Charles W Eichelberger

Bernard Gorowitz

Eric J Wildi

Thomas Paul Feist

Michael Gdula

Wit Bushko

John E Davis

Theresa A Sitnik

Joseph T Woods

Sigfried Aftergut

Robert F Kwasnick

Lionel M Levinson

Jeffrey Wayne Eberhard

Donald Franklin Foust

Constantine A Neugebauer

Steven Thomas Rice

John E Bigelow

James E Kohl

Charles R Stein

Theodore R Haller

Herbert R Philipp

Eugene L Bartels

Somasundaram Gunasekaran

Robert J Woinarowski

Richard A Kashnow

Alfred O Saupe

Methods for forming data storage media and the media formed thereby are disclosed herein. In one embodiment, the method for forming a data storage media, comprises: injection molding a substrate comprising surface features, wherein said surface features have greater than about 90% of a surface feature replication of an original master; and disposing a data layer over at least one surface of said substrate; wherein said data storage media has an axial displacement peak of less than about 500&#x3bc; under shock or vibration excitation.

Methods for making data storage media and the resultant media

Large, light-weight organic devices and methods of preparing large, light-weight organic devices. Specifically, flexible and rigid light-weight plastics are implemented. The flexible plastic may be disposed from a reel. A metal grid is fabricated on the flexible plastic to provide current conduction over the large area. A transparent oxide layer is provided over the metal grid to form the bottom electrode of the organic device. A light emitting or light gathering organic layer is disposed on the transparent oxide layer. A second electrode is disposed over the organic layer. Electrodes are coupled to the metal grid and the second electrode to provide electrical current to or from the organic layer. Depending on the type of materials used for the organic layer, the organic device may comprise an area light device or a photovoltaic device.

Large organic devices and methods of fabricating large organic devices

A radiation imaging system comprising a scintillator, an imager array, and a lamination layer. Lamination layer bonds and optically couples scintillator to imager array. Lamination layer is comprised of a lamination material that is substantially free from void spaces. Radiation imaging system fabrication comprises the steps of disposing lamination layer between a light imager and a scintillator to form a subassembly. Light imager comprises imager array, an imaging plate surface and a plurality of contact pads. Additional steps include subjecting subassembly to a vacuum; heating subassembly to a bonding temperature, exerting a bonding force on subassembly, maintaining the vacuum, the bonding temperature and the bonding force until light imager is bonded to the scintillator and the lamination layer is comprised of lamination material that is substantially free from void spaces.

Systems and methods for detecting ionizing radiation with an imaging system

There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive interconnect pattern on the flexible base, and a plurality of feed through electrodes extending from the first side to the second side of the at least one rigid carrier and electrically connecting the conductive interconnect pattern with the at least one of a plurality of the solid state devices. The solid state devices may be LED chips to form an LED array module.

Plastic packaging of LED arrays

Methods for forming data storage media and the media formed thereby are disclosed herein. In one embodiment, the method for forming a data storage media, comprises: injection molding a substrate comprising surface features, wherein said surface features have greater than about 90% of a surface feature replication of an original master; and disposing a data layer over at least one surface of said substrate; wherein said data storage media has an axial displacement peak of less than about 500&mgr; under shock or vibration excitation.

Methods for making data storage media

In the present invention an adhesive composition is provided. The adhesive composition includes epoxidized cashew nutshell liquid, a catalyst, and diglycidyl ether of bisphenol A. The invention may further include at least one additive selected from the group including curing agents, bonding enhancers, hardeners, flexibilizers, tackifiers, and mixtures thereof.

Epoxy adhesive

A current limiting device utilizes an electrically conductive composite material and an inhomogeneous distribution of resistance structure. The electrically conductive composite material comprises an organic binder portion comprising a high Tg epoxy and a low viscosity polyglycol epoxy; at least one epoxy curing agent; and a conductive powder.

Current limiting device with electrically conductive composite and method of manufacturing the electrically conductive composite

A method for fabricating a flexible interconnect film includes applying a resistor layer over one or both surfaces of a dielectric film; applying a metallization layer over the resistor layer with the resistor layer including a material facilitating adhesion of the dielectric film and the metallization layer; applying a capacitor dielectric layer over the metallization layer; and applying a capacitor electrode layer over the capacitor dielectric layer. The capacitor electrode layer is patterned to form a first capacitor electrode; the capacitor dielectric layer is patterned; the metallization layer is patterned to form a resistor; and the metallization layer and the resistor layer are patterned to form an inductor and a second capacitor electrode. In one embodiment, the dielectric film includes a polyimide, the resistor layer includes tantalum nitride, and the capacitor dielectric layer includes amorphous hydrogenated carbon or tantalum oxide. If the resistor and metallization layers are applied over both surfaces of the dielectric film, passive components can be fabricated on both surfaces of the dielectric film. The dielectric film can have vias therein with the resistor and metallization layers extending through the vias. A circuit chip can be attached and coupled to the passive components by metallization patterned through vias in an additional dielectric layer.

Method for fabricating a flexible interconnect film with resistor and capacitor layers

A low dielectric constant printed circuit board includes: a low dielectric constant porous polymer layer having holes therethrough, the porous layer having pores; and a patterned metallization layer over surfaces of the low dielectric constant porous polymer layer and surfaces of the holes, the patterned metallization layer not significantly protruding into the pores of the porous layer.

Processing low dielectric constant materials for high speed electronics

A method for making an HDI-connected circuit is described, which in a simple manner allows an air pocket, space, gap, or bubble to be formed over pressure- or dielectric-sensitive portions of a semiconductor chip. The method applies a layer of uncured adhesive over a dielectric film, and also over any electrical conductors deposited on the film. The adhesive is exposed through a mask to a laser beam, which selectively vaporizes the adhesive in the exposed regions, to define the air pocket region. The semiconductor chips are applied, electrode-side down, on the adhesive, with the sensitive regions registered with the pockets. The adhesive is cured, and conductive vias are formed through the dielectric film and the adhesive to make contact with the electrodes of the semiconductor chips. Other layers of HDI interconnect are then applied over the dielectric film, and interconnected by vias, if needed. Either before or after the step of making the conductive vias, the bodies of the semiconductor chips are encapsulated.

Method for making air pockets in an HDI context

For fully testing and burning-in an integrated circuit chip before it is incorporated into a high density interconnect or other standard hybrid bare chip circuit, a temporary test substrate having pins extending therethrough holds the chip within a cavity. Chip pads are electrically connected with the pins to create a package that can be tested using commercially available testing and burn-in devices. After testing, the chip is retrieved from the test structure undamaged. In using HDI techniques to interconnect the chip with the pins, metal-filled vias in a polymer layer overlying the temporary test substrate electrically connect the chip to the pins through a metal interconnect pattern on the polymer layer. In another embodiment, the chip is interconnected with the pins through wire bonds. Metal-filled vias pass through an insulative coating on the chip and make electrical contact with the chip pad. A temporary buffer pad connected to a respective via and offset from the chip pad connected to that via comprises a wire-bonding site.

Integrated circuit test structure and test process

A method includes applying a first seed layer extending over a horizontal surface and via sidewalls of a dielectric material and exposed underlying contact metallization; removing at least some of the first seed layer from the contact metallization and the horizontal surface while leaving a sufficient amount of the first seed layer on the sidewalls as a catalyst for subsequent application of a third seed layer; sputtering a second seed layer over the contact metallization and the horizontal surface; using an electroless solution to react with the first seed layer and apply the third seed layer over the sidewalls; and electroplating an electroplated layer over the second and third seed layers.

Method of fabricating metallized vias with steep walls

Growing community of inventors

Scotia, NY, United States of America

Herbert S Cole