Hewlett-packard Company

Agilent Technologies, Inc.

Verigy (singapore) Pte. Ltd.

Herbert L Ko

Gregory Steven Lee

John Dwight Larson, Iii

Richard Keith Karlquist

Kent W Carey

Mark A Hueschen

A method and apparatus for generating a phase-locked output signal includes generating an intermediate signal phase locked to an input signal by frequency dividing the intermediate signal by a temporally-varying divide ratio sequence to generate a first feedback signal and phase comparing the first feedback signal with the input signal. An output signal is generated phase locked to the first feedback signal by frequency dividing the output signal by the temporally-varying divide ratio sequence to generate a second feedback signal and phase comparing the second feedback signal with the first feedback signal.

Method and apparatus for generating a phase-locked output signal

A method and apparatus for modulating a digital input signal is disclosed. The digital input signal is partitioned into a less-significant bit signal and a more-significant bit signal. A lower-order modulation of the less-significant bit signal is performed to generate an intermediate output signal. The intermediate output signal is appended to the more-significant bit signal to form an intermediate input signal. A higher-order modulation of the intermediate input signal is performed to generate a digital output signal. The higher-order modulation is of an order higher than the lower-order modulation. A phase-locked loop using the method and apparatus is disclosed.

Method and apparatus for variable sigma-delta modulation

Transmitter frequency locking across a full duplex communications link. An offset in one transmitter results in an offset at the corresponding receiver. That receiver offset shifts its transmitter in a corresponding manner, causing a correcting offset in the first receiver, which is used to correct the first transmitter. A first embodiment uses filtered received frequency information derived from a baseband demodulator to correct transmitter frequency. A second embodiment uses filtered frequency information from a frequency detector to correct transmitter frequency.

Mutual frequency locking across a link

Systems and methods of monitoring thin film deposition are described. In one aspect, a thin film deposition sensor includes an acoustical resonator (e.g., a thin film bulk acoustical resonator) that has an exposed surface and is responsive to thin film material deposits on the exposed surface. A substrate clip may be configured to attach the thin film deposition sensor to a substrate. A transceiver circuit may be configured to enable the thin film deposition sensor to be interrogated wirelessly. A method of monitoring a thin film deposition on a substrate also is described.

Systems and methods of monitoring thin film deposition

A periodic superconducting device signal quantizer for the fine resolution of the magnetic flux quantum .PHI..sub.0 =2*10.sup.-15 Wb realized by a phase wheel 20 or a phase tree 100. The signal quantizer is used in conjunction with a superconducting A/D converter for achieving the 8-11 bit A/D converters with gigahertz, multi-gigahertz bandwidth. A method for an extra-bit resolution of the analog signal using the signal quantizer is described.

Superconducting quantizer and A/D converter system

The present invention is directed to systems and methods capable of analyzing a wide variety of input signal waveforms to arbitrate their arrival sequence with a high resolution. In an exemplary embodiment, the apparatus is an arbiter circuit which includes an input means for inputting signals whose waveforms are to be analyzed, a comparator means for distinguishing arrival times of the input signals, the comparator means further including means for quantizing flux, and an output means for outputting information which identifies the arrival of at least one of the input signals. In an alternate embodiment, feedback means are provided for compensating asymmetries in the comparator means.

Timing discriminator circuit and method for determining the arrival

A magnetometer having high sensitivity and high resolution is achieved using superconductive circuit elements. The magnetometer includes a pick-up coil, amplifying transformer quantum flux parametron (QFP), latch, feedback gate and feedback inductor fabricated with superconducting elements and coupled to a bidirectional counter. The magnetometer implements an on-chip negative feedback loop. The pick-up coil senses an external magnetic field or gradient resulting in an induced current which is amplified and fed to the QFP which generates a directional indicator signal sent to the latch. When the polarity of the indicator is indicated as corresponding to the polarity of a latch clock signal, a current signal is sent to the feedback gate causing a packet of quantum flux to be generated. The packet is fed back through the feedback inductor, inducing a current in the pick-up coil which opposes the induced current attributable to the external magnetic field. When the induced current in the pick-up coil attributable to the external magnetic field is offset by the induced current attributable to the feedback flux, the magnetometer stabilizes.

Superconducting magnetic field sensing apparatus having digital output,

The present invention is directed to dynamically adjusting the threshold of a magnetic flux sensitive comparator to permit matching of circuit elements for use in A/D converters. For example, comparator threshold variations can be adjusted or programmed to compensate for variations in device components such as resistors. By overcoming parameter matching problems, superconductive A/D converters designed in accordance with the present invention can provide relatively high bandwidth and sampling rates.

Analog-to-digital converter circuits and methods using superconductive

A SQUID comparator having two junctions configured so that its operating characteristics are substantially the same as a single junction SQUID. In particular, the ratio of the critical current of these two junctions is selected to avoid introduction of hysteresis. An n-bit single pass comparator is present that can produce 4-bit A/D conversion up to 10 GHz. A method is implemented to remove effects of dynamic hysteresis by use complementary comparators.

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Mountain View, CA, United States of America

Herbert L Ko