Apple Inc.

Herbert G Derby

Thomas E Dowdy

David R Falkenburg

Cameron J Esfahani

Paul Charlton

Brent Pease

A system and method for increasing the speed and resource utilization of a computer system in which a personal computer uses a portable computer as an extra hard disk. While the portable computer is in SCSI target mode, the unused memory of the portable computer is converted into a disk cache for the hard disk of the portable computer. This enables the portable computer to perform as a very fast disk.

System and method for utilizing the memory of a portable computer as a

A method for arbitrating display output on a display device of a computer system comprises comparing a candidate display area with each rendering display area in a rendering collection and each waiting display area in a waiting collection, and determining whether at least one dependency exists for the candidate display area based on the comparing step, wherein the candidate display area is placed in the waiting queue when at least one dependency exists. The method further includes placing the candidate display area in the rendering collection when the at least one dependency does not exist. The method of arbitration includes releasing the current rendering display area. A method for scheduling display of data on a computer display device includes subdividing partitions of an output screen of the computer display device into display areas, determining whether at least one conflict exists between candidate display data, rendering display data in a rendering collection, and waiting display data in a waiting queue, and adding the candidate display data appropriately to either the rendering collection or the waiting queue based on at least one conflict existing.

Method and system for improved arbitration of a display screen in a

A system and method for increasing utilization of a system bus and frame buffer throughput in a graphic display system. The frame buffer is changed from cache inhibited mode to cached mode in order to take advantage of the burst mode of system bus in which a plurality of values are transferred to the frame buffer following one address. Data coherency is maintained between the cache and the frame buffer by invalidating a cache-line before writing to the cache-line, and by explicitly flushing the cache-line after the cache-line is filled with data.

System and method for using a frame buffer in cached mode to increase

A method for improving the execution speed of compare operations in graphic software functions running on a RISC processor. A branch instruction in a software function comparing the value of two variables is replaced with an inline compare instruction that encodes the result of the compare into a third variable using an arithmetic shift-left instruction. An inline choice instruction selects the value of one of the two variables using the value of the third variable as a mask. The inline compare and an inline choice instructions reduce processor stalls during execution.

Graphic software functions without branch instructions

A method for increasing the speed of a Z-buffer process. The method operates on the observation that groups of points in a scan-line of a polygon are either all visible or all obscured by existing points in the frame buffer. The method processes visible points separately from obscured points. The method only calculates changes in point intensity for the groups of visible points. In addition, the termination of the two separate processes is controlled by placing sentinels at the edge of each scan-line of the polygon so that the comparison of the point's z-values also act as a check for process termination.

Method and system for increasing the speed of a Z-buffer process

A method and system for accelerating graphics images in a computer system comprises encoding a first value information into an address signal from a CPU within the computer system and then encoding a second value information into the data signal from the CPU within the computer system. By encoding the information in this manner the location of the graphics data is unimportant. Hence, an address space of the memory can be utilized as the accelerator. In one aspect of the present invention, a span of a particular scan-line can be encoded in the address signal and the row and color information of the scan-line can be encoded in the data signal. In another embodiment, the span of a particular scan-line can be encoded in the address signal and the row, color information and intensity value information can be encoded into the data signal. The method and system uses to advantage that the main memory of the computer system has a large area which can be configured as an addressable space when rendering graphic images. Accordingly, graphics images can be rendered more quickly with minimal additional software and hardware overhead.

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Boulder Creek, CA, United States of America

Herbert G Derby