Semiconductor Manufacturing International (Shanghai) Corporation

Shanghai Lexvu Opto Microelectronics Technology Co., Ltd.

Ningbo Semiconductor International Corporation

Semiconductor Manufacturing International (Beijing) Corporation

Semiconductor Manufacturing International Corp.

Herb He Huang

Clifford Ian Drowley

Haiting Li

Jiguang Zhu

Zhongshan Hong

Fucheng Chen

Yanghui Xiang

Hai Long Li

Xianyong Pu

Yiqun Chen

Hongtao Ge

Wei Li

Mieno Fumitake

Jianhong Mao

Hailong Luo

Fei Qi

Qiang Zhou

Jing Fu

Xinxue Wang

Hongbo Zhao

Ziru Ren

Xingcheng Jin

Cliff Drowley

Xia Feng

Lei Zhang

Jianping Yang

Jieguang Huo

Xuanjie Liu

Liangliang Guo

Haifang Zhang

Xuan Jie Liu

Chris Chang Yu

Guoan Liu

Ji Guang Zhu

Jerry Liu

Phil Wu

Yao Liu

Yefang Zhu

Pinghuan Wu

Fish Ren

Nancy Han

Yi'nan Han

Yinan Han

Chunxiao Yang

Guanqie Gao

Halting Li

Guan Qie Gao

De Jun Bao

Dejun Bao

The present invention discloses a composite substrate for manufacturing an acoustic wave resonator and a Surface Acoustic Wave (SAW) resonator, and a manufacturing method thereof. The manufacturing method of the composite substrate includes: providing a base, wherein the base includes a first surface and a second surface that are opposite to each other; and a first groove sunken towards the second surface is formed on the first surface; and providing a piezoelectric plate, wherein the piezoelectric plate is matched with the first groove in shape, and a bottom of the first groove is integrated with the piezoelectric plate by bonding; and the composite substrate includes: a base, wherein the base includes a first surface and a second surface that are opposite to each other; and a first groove sunken towards the second surface is provided on the first surface; and a piezoelectric plate, wherein the piezoelectric plate is embedded into the first groove, and a top of the piezoelectric plate is higher than the first surface or flush with the first surface.

Manufacturing method of a composite substrate of an acoustic wave resonator

A thin film piezoelectric acoustic wave resonator and a manufacturing method therefor, and a filter. The thin film piezoelectric acoustic wave resonator includes: a first base, an upper electrode, a piezoelectric plate body, a lower electrode and an isolation cavity. The upper electrode, the piezoelectric plate body and the lower electrode are arranged on an upper surface of the first base and are stacked sequentially from top to bottom. The upper electrode, the piezoelectric plate body and the lower electrode have an overlapping region in a direction perpendicular to the surface of the piezoelectric plate body, in which a first gap is formed between the piezoelectric plate body and the upper electrode, and a second gap is formed between the piezoelectric plate body and the lower electrode. The isolation cavity surrounds the periphery of the piezoelectric plate body and connects the first and second gaps together. At least one connecting bridge is arranged between the piezoelectric plate body and the base.

Thin film piezoelectric acoustic wave resonator and manufacturing method therefor, and filter

A thin-film bulk acoustic resonator (FBAR) apparatus includes a lower dielectric layer including a first cavity; an upper dielectric layer including a second cavity, wherein the upper dielectric layer is on the lower dielectric layer; and an acoustic resonance film that is positioned between and separating the first and the second cavities. The acoustic resonance film includes a lower electrode layer, an upper electrode layer, and a piezoelectric film that is sandwiched between the lower and upper electrode layers. A plan view of the first and the second cavities overlap to form an overlapped region having a polygonal shape without parallel sides.

Thin-film bulk acoustic resonator and semiconductor apparatus comprising the same

A thin-film bulk acoustic resonator, a semiconductor apparatus including the acoustic resonator and its manufacturing method are presented. The thin-film bulk acoustic resonator includes a lower dielectric layer, a first cavity inside the lower dielectric layer, an upper dielectric layer, a second cavity inside the upper dielectric layer, and a piezoelectric film that is located between the first and second cavities and continuously separates these two cavities. The plan views of the first and the second cavities have an overlapped region, which is a polygon that does not have any parallel sides. The piezoelectric film of this inventive concept is a continuous film without any through-hole in it, therefore it can offer improved acoustic resonance performance.

A semiconductor device includes a first substrate having a first surface and a second surface opposite to the first surface, a shallow trench isolation in the first substrate, the shallow trench isolation having a first depth, the first depth being a distance from a bottom of the shallow trench isolation to the first surface of the first substrate, a transistor on the first surface of the first substrate, a first dielectric cap layer covering the first surface of the first substrate, a first interconnect structure on the first dielectric cap layer, a carrier substrate bonded to the first substrate through the first dielectric cap layer, a second dielectric cap layer on the second surface of the first substrate; and a through silicon via extending through the second dielectric cap layer, the shallow trench isolation, and the first dielectric cap layer, and connected to the first interconnect structure.

Backside processed semiconductor device

A resonator may include a first dielectric member, a second dielectric member, and a composite member. The first dielectric member may have a first cavity. The composite member may include a piezoelectric layer and may overlap at least one of the first dielectric member and the second dielectric member. At least one of the second dielectric member and the composite member may have a second cavity. The piezoelectric layer may be positioned between the first cavity and the second cavity. A projection of the first cavity in a direction perpendicular to a flat side of the first dielectric member and a projection of the second cavity in the direction may intersect each other to form a polygon. No two edges of the polygon may be parallel to each other.

Resonator and related manufacturing method

A method for manufacturing a semiconductor apparatus includes: on a base substrate, forming an isolation trench layer, a first dielectric layer, a lower electrode layer and a second dielectric layer; forming a piezoelectric film and an upper electrode layer in an opening in the second dielectric layer; forming a third dielectric layer; forming a first cavity in the third dielectric layer to expose at least part of the upper electrode layer; bonding a first assistant substrate to seal the first cavity; removing a part of the base substrate to expose the isolation trench layer; forming a fourth dielectric layer on a side of the isolation trench; and etching through the fourth dielectric layer, the isolation trench layer, the first dielectric layer to form a second cavity beneath the lower electrode layer, plan views of the first and second cavities providing an overlapped region having a polygon shape without parallel sides.

Manufacturing of thin-film bulk acoustic resonator and semiconductor apparatus comprising the same

A method for manufacturing a semiconductor apparatus includes: on a base substrate, forming an isolation trench layer, a first dielectric layer, a first metal connecting layer, a piezoelectric film, and an upper electrode layer; forming an acoustic resonance film by patternizing the piezoelectric film, the upper electrode layer, and the first metal connecting layer; above the base substrate, forming a second dielectric layer and a third dielectric layer; forming a first cavity through the third and second dielectric layers, and the protection layer; removing a part of the base substrate to expose the isolation trench layer; forming a fourth dielectric layer under the isolation trench layer; and forming a second cavity through the fourth dielectric layer, the isolation trench layer, and the first dielectric layer, plan views of the first and second cavities forming an overlapped region having a polygon shape without parallel sides.

A resonator may include a first dielectric member, a second dielectric member, a composite member, a first sealer, and a second sealer. The first dielectric member may have a first cavity. The second dielectric member may have a second cavity. The composite member may include a piezoelectric layer and may be positioned between the first cavity and the second cavity. The first sealer may be positioned between two portions of the first dielectric member. The first cavity may be positioned between the first sealer and the composite member. The second sealer may be positioned between two portions of the second dielectric member. The second cavity may be positioned between the second sealer and the composite member.

A semiconductor device may include the following elements: a first substrate; a second substrate; a dielectric layer, which may be positioned between the first substrate and the second substrate and may have a hole; a first conductive member, which may be positioned in the dielectric layer; a second conductive member, which may be positioned in the dielectric layer, may be spaced from the first conductive member, and may be positioned closer to the second substrate than the first conductive member; and a third conductive member, which may contact both the first conductive member and the second conductive member through the hole.

Semiconductor device, related manufacturing method, and related electronic device

A device includes a first integrated circuit containing a photodiode and a first metal interconnect structure connected to the photodiode, and a second integrated circuit containing a transistor and a second metal interconnect structure connected to the transistor. The first integrated circuit and the second integrated circuit are connected together through the first metal interconnect structure and the second metal interconnect structure. Since no transistor is present around the photodiode, the photodiode has an increased photosensitive area and an improved fill factor, resulting in an increase of the quantum efficiency, higher integration and lower consumption of the image sensor.

Vertically integrated three-dimensional CMOS image sensors (3D CIS) bonded with control circuit substrate

The present disclosure provides a method for forming a transistor, including: forming a base structure, containing a first gate structure, an active layer covering the first gate structure, and an insulating structure in the active layer; forming a second gate structure on the active layer; forming a source-drain region, including a source region and a drain region in the active layer each on a different side of the second gate structure; and forming a first interlayer dielectric layer covering the base structure and the second gate structure. The method also includes: forming a first contact hole that exposes the first gate structure by etching the first interlayer dielectric layer and the insulating structure; and forming a second contact hole that exposes the second gate structure and a third contact hole that exposes the drain region by etching the first interlayer dielectric layer.

Transistor and method for forming the same

A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The semiconductor device also includes a plurality of transistors on the second semiconductor substrate, a deep trench isolation having a bottom at a surface of the first semiconductor substrate in the second region, the deep trench isolation exposing a sidewall of the second semiconductor substrate and a sidewall of the buried insulating layer, and a dielectric capping layer filling the deep trench isolation and covering the plurality of transistors on the second semiconductor substrate.

Deep trench isolation for RF devices on SOI

A semiconductor device includes an inductor disposed on a surface of an intermetallic dielectric layer at a location below which no virtual interconnect members are present. Thus, parasitic capacitance is reduced or eliminated and the Q value of the inductor is high.

Inductor device

A semiconductor device includes a substrate, a first transistor, and a second transistor. The first transistor includes a first source terminal formed of a material and connected to a first source, a first drain terminal formed of the material and connected to a first drain, a first gate overlapping a portion of the substrate that is between the first source and the first drain, and a first dielectric layer between the first gate and the substrate. The second transistor includes a control gate formed of the material and overlapping a part of the substrate that is positioned between a second source and a second drain, a second dielectric layer between the control gate and the substrate, a floating gate extending through the second dielectric layer to contact a doped region in the substrate, and an insulating member positioned between the control gate and the floating gate.

Growing community of inventors

Shanghai, China

Herb He Huang