Samsung Electronics Co., Ltd.

Heon-Heoung Leam

Hyeon-Deok Lee

Young-sub You

Bong-hyun Kim

Yong-Woo Hyung

Tae-Soo Park

Disclosed is a method of manufacturing a MOS transistor having an enhanced reliability. A passivation layer is formed on a gate electrode and on a substrate to prevent a generation of a recess on the substrate. After a mask pattern is formed on the substrate for masking a portion of the substrate, impurities are implanted into an exposed portion of the substrate to form source and drain regions. The substrate is rinsed so that the passivation layer or a recess-prevention layer is substantially entirely or partially removed while the mask pattern is substantially completely removed, thereby forming the MOS transistor. Therefore, the generation of the recess in the source and drain region of the substrate can be prevented due to the passivation layer during rinsing of the substrate.

Growing community of inventors

Seoul, South Korea

Heon-Heoung Leam