At&t Bell Laboratories

Bell Telephone Laboratories

American Telephone & Telegraph Co., At&t Bell Laboratories

Other

Henryk Temkin

Ralph A Logan

Vassilis G Keramidas

Aland K Chin

Morton B Panish

Lloyd R Harriott

Thomas P Pearsall

Robert J McCoy

Tawee Tanbun-ek

Yuh-Lin Wang

Alfred Yi Cho

John C Bean

Anatoly Feygenson

Daniel P Wilt

Roosevelt People

Bulusu V Dutt

Gilbert Y Chin

Walter R Holbrook

Claude L Reynolds, Jr

Michael A DiGiuseppe

Vincent D Mattera

David V Lang

Julie A Shimer

Kambiz Alavi

Gerald J Dolan

Paul A Garbinski

Arsam Antreasyan

Expedient fabrication of fine-featured integrated circuits entails aperture pattern delineation to produce a masking layer atop a semiconductor body followed by insertion within a controlled atmosphere chamber within which device-functional layered material is epitaxially grown within apertures. Critical, device-consequential properties of epitaxial material is assured by removal of a thin surface layer of material revealed during delineation. Such removal, sufficient to eliminate meaningful contamination and/or crystalline damage introduced during delineation, is of sufficiently small quantity as to be accommodated within the chamber. Under most circumstances, the controlled atmosphere is at reduced pressure as required for e.g. MOMBE epitaxial growth.

Device fabrication

Fine featured devices are produced by a series of fabrication steps including exposing selective surface regions to irradiation, e.g. to an ion beam, generally to result in removal of masking material within irradiated regions. In most instances, subsequent etching is under conditions such that bared material is preferentially removed. Etch-removal and irradiation are such that overgrown material is of device quality at least in etched regions. The inventive process is of particular value in the fabrication of integrated circuits, e.g. circuits performing electronic and/or optical functions. The inventive process is expediently used in the fabrication of structures having minimum feature size of 1 micrometer and smaller. Patterning is dependent upon masking material of a maximum thickness of 100 .ANG..

Disclosed is a graded index separate confinement heterostructure quantum well (GRIN-SCH QW) laser with continuously graded, substantially index matched InGaAsP confinement layer. The inventive device is well adapted for high power output in the wavelength region 1.2-1.68 .mu.m. In particular, it can readily be designed to have an output wavelength that makes it suitable as pump source for Er-doped optical fiber amplifiers. A method of manufacturing a laser according to the invention is also disclosed.

InP-based quantum-well laser

Described is a method for forming epitaxial films comprising successive layers of at least ternary and at least quaternary III-V material grown by metalorganic vapor-phase epitaxy. Between the steps of growing successive layers, the growth chamber is first flushed, advantageously in successive steps using a pair of gaseous Group V hybrides, a few monolayers of binary III-V material are then deposited, and then the growth chamber is again flushed. As a result, interfaces are sharper and interfacial defects are reduced. Also described are quantum well lasers made according to the inventive method.

Method for forming a heteroepitaxial structure, and a device

When high-vacuum methods are used in the manufacture of miniaturized devices such as, e.g., semiconductor integrated-circuit devices, device layers on a substrate are preferably patterned without breaking of the vacuum. Preferred patterning involves deposition of a semiconductor mask layer, generation of the pattern in the mask layer by ion deflected-beam writing, and transfer of the pattern by dry etching. When the mask layer is an epitaxial layer, further epitaxial layer deposition after patterning may proceed without removal of remaining mask layer material.

Patterning method in the manufacture of miniaturized devices

Group III-V compound MISFETs include a low-doped diffusion barrier layer disposed between a source/drain contact-facilitating layer and the channel layer.

Group III-V compound field effect transistor with diffusion barrier

A strained layer superlattice comprising Ge.sub.x Si.sub.1-x layers interleaved with Si layers is an excellent photodetector at infrared wavelengths due to the large shift in bandgap caused by the strain in the superlattice.

Device having strain induced region of altered bandgap

A buried-heterostructure distributed feedback laser is described, including a grating structure at a surface of a nonplanar cladding layer. The grating structure can be made by transfer of a pattern by ion milling, the pattern being defined in an ion-beam resist layer, e.g., by direct-writing electron-beam exposure. Low-threshold, high-power lasers are obtained with a commercially favorable yield.

Method of making a nonplanar buried-heterostructure distributed-feedback

The specification describes an improved form of heterostructure laser, termed a 'Rib-Loc' laser. It is an easily fabricated device with desirable electrical and optical properties. The Rib-Loc is simple to fabricate because a single, self-aligned rib provides ohmic contact, current confinement and lateral waveguiding. A deeply etched P-cladding layer outside the rib provides the positive index change needed for an index-guided laser. The large optical cavity increases the maximum power output and reduces the aspect ratio of the beam.

Self-aligned rib-waveguide high power laser

A multi-quantum well laser having a Ga.sub.0.47 In.sub.0.53 As/Al.sub.0.48 In.sub.0.52 As active region emitting at 1.55 .mu.m and well layers having a thickness less than 150 Angstroms.

Multi-quantum well laser emitting at 1.5 .mu.m

A light emitting diode designed to emit primarily at 1.3 microns comprises a crystal having a plurality of lattice matched layers including an n-type indium phosphide front surface layer, an n-type indium phosphide buffer layer, a p-type indium gallium arsenide phosphide active layer, a p-type indium phosphide confining layer and an indium gallium arsenide back surface layer, and an annular front contact and a limited area back contact to the crystal.

Light emitting diode

An ohmic contact to a semiconductor device comprising p-type InP is formed by sequentially depositing beryllium-gold and gold layers on InP and then heat-treating the device at a temperature less than 440 degrees C. An ohmic contact to p-type InGaAsP can be similarly formed.

Beryllium-gold ohmic contact to a semiconductor device

Ohmic contact to p-type InP

Indium phosphide stoichiometry in III-V semiconductor devices is sensitive to processing conditions during liquid phase epitaxy deposition. Disclosed is a method for determining indium-to-phosphorus ratio in an n-type indium phosphide semiconductor surface layer by monitoring photoluminescence at an absorption band at or near 0.99 electron volt.

Monitoring indium phosphide surface composition in the manufacture of III-V

Localized nonuniformities in semiconductor crystals are analyzed by scanning the semiconductor surface with an electron beam and detecting and analyzing the radiation that is generated at the semiconductor surface by the electron beam and which passes through the semiconductor crystal.

Growing community of inventors

Berkeley Heights, NJ, United States of America

Henryk Temkin