Amazon Technologies, Inc.

Barefoot Networks, Inc.

Henry Wang

Ron Diamant

Kun Xu

Patricio Kaplan

Mohammad El-Shabani

Zhao Ma

Multi-threaded data movement request handling techniques are disclosed. The techniques can include performing, by a direct memory access (DMA) engine, one or more data movement operations associated with a data movement phase of a first data movement task, initiating a data movement phase of a second data movement task during a wait period for the sync phase of the first data movement task, initiating the sync phase of the first data movement task following expiration of the wait period for the sync phase of the first data movement task, and performing a sync operation associated with the sync phase of the first data movement task.

Multi-threaded data movement request handling

A direct memory access (DMA) engine can be used to multicast data from system memory to a target memory for loading into an array. The DMA engine may include a controller that is configured to receive a data transfer request, and generate a set of write operations for the output interface. The set of write operations can include, for each of multiple partitions of the target memory, a write operation to write usable data from the multicast data to an address offset in the corresponding partition, and an additional write operation to write filler data from the multicast data to a null device address.

Data replication for accelerator

Some embodiments provide a method for configuring unit memories (e.g., unit static random access memories (SRAMs) and ternary content addressable memories (TCAMs) of a network forwarding IC to implement a set of longest prefix matching (LPM) tables. Two different methods of providing a longest prefix match (LPM) operation that minimize the use of ternary content addressable memory (TCAM) are presented. Each method takes advantage of the use of match-action stages and the programmability of the unit memories. An algorithmic LPM embodiment is presented which uses a TCAM index with pointers to SRAM partitions that store subtrees of a routing tree (routing trie structure) and performs subtree rearrangements in the partitions upon the addition of certain routing entries. A chained LPM embodiment, allocates separate exact-match tables for a set of address prefix lengths in, for example, SRAMS, as well as a set of non-exact match tables in, for example, TCAMs.

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San Bruno, CA, United States of America

Henry Wang