Cadence Design Systems, Inc.

Other

Trade Box, LLC

Mentor Graphics Corporation

Black Design Associates, LLC

Henry K Yu

Hui Xu

David Joseph Richmond

Howard C Richmond

Roland Ruehl

Joshua Alexander Baudhuin

Michael A Ragosta

Claudio Marino

Bruno Meglio

Karun Sharma

Harindranath Parameswaran

Sanjib Ghosh

Varad Joshi

Timothy Rosek

Darren Zacher

Simon Simonian

Mandar Chitnis

Anil Khanna

Jefferson McCrory

Elias Lee Fallon

Regis R Colwell

Craig R Steele

Kuoching Lin

Yinnie Lee

Pardeep Juneja

Matthew W Tivnon

Harsh Deshmane

Anjna Khanna

Jeff Taraldson

Manuel A Montano

Gilles S C Lamant

Jeffrey Markham

Min Cao

Sandipan Ghosh

Chandra Prakash Manglani

Kanaka Raju Gorle

Nikhil Garg

Subhashis Mandal

John Hainsworth

Johannes Franz Xaver Grad

Vinny George Korah

Juno Jui-Chuan Lin

Disclosed is an approach for implementing placement for an electronic design, where when a dragged object is moved into a desired area, existing objects in that location are automatically moved as necessary in correspondence to the movement of the dragged object. Existing objects are only moved if they are causing a spacing violation or overlap with the dragged object being moved, either directly or indirectly.

Method, system, and computer program product for rearrangement of objects within an electronic design

Disclosed are techniques for implementing routing aware floorplanning or placement for an electronic design. These techniques preprocess an electronic design and a plurality of inputs for a floorplanner or placer, identify a tentative location for inserting a block comprising one or more pins into a floorplan or placement layout, snap the block to a legal location based at least in part upon one or more characteristics of the one or more pins or one or more pseudo-pins, and update the floorplan or placement layout with one or more geometric routes based in part or in whole upon the legal location.

Method, system, and computer program product for implementing routing aware placement or floor planning for an electronic design

Disclosed is an approach to implement snapping techniques that aid the interactive, assisted, or automatic placement of layout instances or groups of layout instances for generating a legal placement layout while reducing or entirely eliminating any subsequent or separate performance of design rule checking with respect to the relevant design rules, constraints, or requirements governing the legality of the instances or groups of instances placed in the placement layout.

Method, system, and computer program product to implement snapping for an electronic design

Disclosed are techniques for implementing group legal placement on rows and grids for an electronic design. These techniques identify a group comprising a plurality of instances. A proxy is identified from the plurality of instances. The group is placed in a row region based in part or in whole upon a plurality of permissible characteristics for the proxy without considering permissible characteristics of one or more remaining instances in the group. A group legality may be performed to determine whether the group is placed in the row region in a group legal manner.

Method, system, and computer program product for implementing group legal placement on rows and grids for an electronic design

Disclosed are techniques for implementing routing aware placement for an electronic design. These techniques identify a block having one or more first pins or interconnects to be inserted into a first layer corresponding to a first set of tracks and identify a second set of tracks on a second layer adjacent to the first layer. One or more candidate locations may be generated on the first layer for the block based in part or in whole upon the first set of tracks. The block may be inserted into a candidate location on the first layer based in part or in whole upon respective costs or routability of the one or more candidate locations with respect to the second set of tracks.

Method, system, and computer program product for implementing routing aware placement for an electronic design

Disclosed are techniques for implementing legal placement with contextual awareness for an electronic design. These techniques identify one or more hierarchies from one or more groups or one or more instances located at these one or more hierarchies in a layout or floorplan. A plurality of instances including the one or more identified instances may be promoted to an honorary top hierarchy. A layout operation may then be performed on the one or more identified instances based in part or in whole upon a boundary requirement and context information.

Method, system, and computer program product for implementing legal placement with contextual awareness for an electronic design

Disclosed herein are representative embodiments of methods and apparatus for managing and allocating hardware resources during RTL synthesis. For example, in one exemplary method disclosed herein, an RTL description of a circuit to be implemented in a target architecture is received. The target architecture of this embodiment comprises a fixed number of hardware resources in a class of hardware resources. One or more operator instances are determined from the RTL description received, where at least some of the operator instances are implementable by the hardware resources in the class of hardware resources. In this embodiment, and prior to initially synthesizing the RTL description into a gate-level netlist, assignment information indicative of how the operator instances are to be implemented using the hardware resources in the class of hardware resources is automatically determined. A graphical user interface is also provided that allows a user to view and modify the assignment information.

Managing and controlling the use of hardware resources on integrated circuits

A hair styling and drying apparatus has a pair of pivotally connected arms, styling surfaces on the arms, air suction and discharge orifices in the styling surfaces, and a blower for blowing air through the air orifices and recycling air between the arms. At least some suction orifices of one styling surface can align with at least some discharge orifices of the other styling surface. The blowers blow air out the discharge orifices and suck air into the suction orifices, thereby recycling much of the blown air. The apparatus can include heaters for heating the blown air and for heating the styling surfaces.

Hair styler

Disclosed encompasses method, system, computer program product for implementing interactive checking of constraints. Various embodiments bridge schematic design environment and layout environment with a binder mapping process and utilize connectivity information from the schematic design to identify constraint violations early in the physical design stage. The method identifies or creates a layout and identifies or generates an object for a modification process. The method may take snapshot(s) of the design database or may use one or more logs for restoring the design database. The method then identifies or creates scratch pad(s) and performs modification process on the object to generate a change. The method uses scratch pad(s) and trigger(s) to perform constraint checking during the modification process to provide interactive feedback in response to the modification process before committing the change to the persistent database.

Methods, systems, and articles of manufacture for implementing interactive, real-time checking or verification of complex constraints

Disclosed is a method and system for visualizing legal locations of edges and dimensions for an object being placed or edited in the layout. During the design process, visual indicators may be provided to the user to indicate the legal locations at which edges of an object may be placed in the layout. Gravitation and/or snapping may be provided automatically identify and/or move the edges to the legal locations. However, the user can control whether and under what circumstances the gravitation and/or snapping will occur. In this way, the designer does not need to manually place the edges of every single object, which is especially helpful for objects that are intended to have an edge at a legal location. Upon a design choice by the designer, the objects can be edited so that an edge does not need to immediately comply with a design rule.

Method and system for implementing an improved interface for designing electronic layouts

Computer-implemented method, system and computer program product for double patterning technology (DPT) odd loops visualization within an integrated circuit design layout are disclosed. The method, system and computer program product comprise mapping all violations of the integrated circuit design layout to a graph. The method, system and computer programming product also includes partitioning the graph into a plurality of sub-graphs. Each of the plurality of sub-graphs includes multiple edges and multiple nodes. The method, system and computer product further include detecting all possible odd loops in each of the plurality of sub-graphs; and visualizing all of the odd loops in at least one of the plurality of sub-graphs.

Method and system for double patterning technology (DPT) odd loop visualization for an integrated circuit layout

Hair dryer

Disclosed are methods and systems for implementing constraint and connectivity aware physical designs. The method or system provides a connectivity-aware environment to implement electronic designs. For example, the method interactively determines whether an electronic design complies with various constraints by using connectivity information in a nearly real-time manner while the electronic design is being created in some embodiments. The method or system uses the connectivity information provided by a connectivity engine or specified by designers to present feedback to a user as to whether a newly created object or a newly modified object complies or violates certain relevant constraints in an interactive manner or in nearly real-time without having to perform such constraints checking in batch mode. The method further enables one to implement electronic designs by using connectivity information without performing extraction on layouts or rebuilding nets.

Methods, systems, and computer program product for implementing electronic designs with connectivity and constraint awareness

Various embodiments provide a constraint-driven environment to interactively determine coloring of layout components when the layout components are being modified or created and to provide feedback with visual aids to users in nearly real-time. Layout components are thus appropriately assigned to respective mask designs upon their creation. Various embodiments check or verify various constraints during creation or modification of layout components, and the layout thus remains design rule clean as constructed. Some embodiments use data structure(s) including information associated with mask identifications of objects of a cluster to change some mask identifications without considering any of the constraints governing these mask identifications. Some embodiments further determine the mask identification for an object based at least in part on whether object splitting and stitching is permitted.

Methods, systems, and computer program products for implementing interactive coloring of physical design components in a physical electronic design with multiple-patterning techniques awareness

Growing community of inventors

Los Angeles, CA, United States of America

Henry K Yu