Telefonaktiebolaget Lm Ericsson (publ)

Henrik Borgengren

Magnus Karlsson

Jonas Malmberg

Fredrik Wahledow

Anders Kullman

Oscar Persson

Martin Hägerdal

Gary Edmonds

A control circuit for a switched mode power supply (SMPS) has an input voltage reference voltage generator arranged to receive a signal indicative of an input voltage of the SMPS and is arranged to generate a reference signal directly proportional to the input voltage. An error signal generator of the control circuit is arranged to receive a signal indicative of an output voltage of the SMPS and arranged to generate an error signal based on the reference signal generated by the input reference voltage generator and based on the output voltage of the SMPS. A duty cycle control signal generator of the control circuit is arranged to generate a control signal, to control the duty cycle of the SMPS, in dependence upon the error signal.

Controlling a switched mode power supply with maximised power efficiency

An intermediate bus architecture power supply system including an output voltage feedback-regulated, isolated first stage switching voltage converter (SVC) such as an intermediate bus converter, connected via an intermediate voltage bus (IVB) to at least one second stage DC-to-DC voltage converter. The first stage SVC is configured to adjust its switching duty cycle to compensate for voltage fluctuations on the IVB. The voltage regulation mechanism of the first stage SVC may thus suppress oscillations in the IVB voltage which originate from the first stage SVC's input or from fluctuations in the system's load current, and consequently reduce electromagnetic interference as well as the amplitude of voltage and current fluctuations on the IVB.

Intermediate bus architecture power supply

To reduce power loss in an intermediate bus architecture power system, embodiments of the present invention provide an intermediate bus converter which converts an input voltage to an intermediate bus voltage using a converting unit; receives a signal indicative of an output of a converting unit; determines an intermediate bus voltage to reduce power loss in dependence upon the signal indicative of an output of the converting unit; generates a control signal to control the converting unit to convert the input voltage to the determined intermediate bus voltage; and generates an intermediate bus voltage in dependence upon the control signal.

Control of dynamic bus voltage in an intermediate bus architecture power system

A switching delay controller is configured to control a switching delay between the switching of first and second switching elements in a switched mode power supply. The switched mode power supply generates a feedback signal indicative of a difference between an output of the switched mode power supply and a reference for the output, and switches the first and second switching elements to convert an input voltage into an output voltage based on the feedback signal. The switching delay controller includes a switching delay calculator operable to cause a change of the switching delay for at least one switching cycle of the switched mode power supply, and a feedback signal monitor operable to monitor the feedback signal and determine a change in the feedback signal in response to the change of the switching delay by the switching delay calculator.

Switching delay controller for a switched mode power supply

A switched mode power supply (SMPS) comprising a feedback unit, voltage feed forward (VFF) compensation signal generator and a transient detector. A VFF compensation signal is only applied to the output of the feedback unit when a transient is detected by the transient detector on the input voltage of the SMPS, thereby saving power and computation time. The transient detector comprises a first comparator to detect that a positive transient has occurred if a difference signal is greater than a positive threshold level; a second comparator to determine if the difference signal is within a predetermined range of positive values and output a result that indicates if the difference signal is within the predetermined range of positive values; and a first calculator to detect that a positive transient has occurred if, out of a first predetermined number of consecutive results of the output of the second comparator, there is at least a second predetermined number of results indicating that the difference signal is within the predetermined range of positive values. The transient detector comprises further features for similarly detecting a negative transient.

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Kalmar, Sweden

Henrik Borgengren