U.S. Philips Corporation

Henricus E Wulms

Cornelis Am Mulder

Bernardus H Cornelissen

A high speed I.sup.2 L circuit having a topology which is based on a layout of parallel arranged gate circuits in which the inverter transistors of each gate circuit are arranged in a row and below the signal lines to which they are connected, said signal lies extending transversely to the rows, while the complementary transistors for the current supply of the inputs of the gate circuits are situated laterally beside the signal lines. Said layout facilitates the designing of comparatively compact I.sup.2 L circuits in which various measures to increase their speed can be taken, for example, the use of dielectric isolation, reduction of the input series resistance, reversal of the doping profile and the application of a potential difference between the bases of the complementary transistors and the common emitter of the inverter transistors.

Integrated circuit

In a push-pull switching circuit, whose output transistors are controlled by complementary control signals, one of the gate electrodes which carries a 'low' signal is kept just at the threshold voltage of the output transistor to be cut off by means of a transistor substantially identical to the output transistors, the gate electrode and the drain electrode of this transistor being interconnected. The junction of this gate and this drain is connected to the common of two cross-coupled transistors, which are connected by their drains to the gate electrodes of the respective output transistors.

Digital switching circuit having insulated gate field effect transistors

A logic circuit in I.sup.2 L wherein across the base-emitter paths of the NPN-transistors diodes are connected in order to reduce the propagation delay time of the logic circuit.

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Eindhoven, Netherlands

Henricus E Wulms