Nxp B.v.

Nxp Usa, Inc.

Henri Verhoeven

Oswald Moonen

Edwin Jan Schapendonk

Matheus Johannus Gerardus Lammers

Wouter Van Der Heijden

Klaas Wortel

Ton Van Deursen

Klaas Brink

Henricus Cornelis Johannes Buthker

Joop Petrus Maria Van Lammeren

Stephen Owen

Theo Thurlings

Jan Inghels

A task performance system and method including multiple transmitters and multiple task devices distributed in a local area. Each task device includes communication circuitry, a memory, a controller, and output circuitry. The communication circuitry receives timing information and position information from the transmitters. The transmitters may also transmit task information including task location parameters that define the task area. The task area is divided into subblocks each having a corresponding task value. The controller uses the received information to determine its location and accesses the memory when located within the task area to retrieve a corresponding task value based on subblock location. The task information includes task values which may define a different task for each subblock. The controller activates output circuitry in accordance with the task value to perform a corresponding task. The output circuitry may include one or more light sources, a speaker, a vibration device, etc.

Task performance based on location

One example discloses a security device, including: a bulk security capacitance, including a first endpoint and a second endpoint, and having, a first layer including a first set of conductive elements, the first endpoint, and the second endpoint; and a second layer including a second set of conductive elements; wherein the first set of conductive elements and the second set of conductive elements together form at least two bulk capacitors in series; wherein the first and second layers are separated by a distance; and wherein the first and second endpoints are configured to be coupled to a tamper detection circuit configured to detect a change in the bulk security capacitance.

Security device

An apparatus and method for measuring energy cell impedance. Time sequences representing each of a repetitive signal, an orthogonal-phase-repetitive signal at the characterizing frequency, and at least one term of a power series polynomial are generated. One of a current or voltage corresponding to the repetitive signal is applied to an energy cell. Contemporaneously with the applying, measured values of a current or voltage are measured. A set of correlation values between the measured values and the generated time sequences are determined. The set of correlation values are transformed into a set of fitted coefficients of a repetitive signal component and an orthogonal-phase-repetitive signal component at a characterizing frequency. An impedance of the energy cell at the characterizing frequency is determined based on a ratio of the fitted coefficients for the orthogonal-phase-repetitive component to the repetitive signal component.

Non steady state energy cell impedance measurement

A controller for a DC-DC converter that includes an inductor. The DC-DC converter has three phases of operation: a first phase, in which an input voltage charges the inductor; a second phase, in which the inductor discharges to a load; and a third phase, in which the inductor is disconnected from the load and in which the input voltage does not charge the inductor. The controller is configured to set a control-factor based on the input voltage of the DC-DC converter, and set the duration of the third phase based on the control-factor and the sum of the duration of the first phase and the second phase.

Controller for a DC-DC converter

An integrated circuit (IC) includes an input/output (I/O) circuitry with a first circuitry section including I/O pins and a second circuitry section including I/O pins. The first and second circuitry sections are mutually exclusive sections of the I/O ring. The first circuitry section includes a first I/O pin configured to receive an input voltage from a first energy source and a second I/O pin connectable to an external startup capacitor. A startup circuit is coupled to the first I/O pin and the second I/O pin. Upon receiving the input voltage from the first energy source, the startup circuit enters a during the startup phase and isolates the first circuitry section from the second circuitry section, and provides charge to the external startup capacitor. In response to achieving a predetermined minimum charge on the external startup capacitor, the first circuitry section is connected to the second circuitry section, and the startup phase ends and the IC transitions to a functional mode of operation.

Power supply with startup circuit for low power devices

One example discloses an organic matter powered device, comprising: a set of electrodes configured to be coupled to a set of biologically active organic matter; a power generation circuit coupled to the electrodes; wherein the power generation circuit is configured to receive a first voltage and current from the organic matter, and output a second voltage and current generated by the first voltage and current; a monitoring circuit coupled to the electrodes and coupled to monitor the first voltage and current, and to be powered by the second voltage and current; wherein the monitoring circuit is configured to translate variations in the first voltage and current into an environmental attribute.

Organic matter powered device

A tamper detection device includes a detection circuit, configured to be powered by a near-field-communication (NFC) signal and store a status of a detection element; wherein the detection circuit is configured to set the status to undisturbed in response to an undisturbed state of the detection element; wherein the detection circuit is configured to set the status to disturbed in response to a disturbed state of the detection element; and wherein the detection circuit is configured to electrically report the detection element status in response to a wireless query signal.

Tamper detector

Embodiments of a method for amplifier calibration and an amplifier system are described. In one embodiment, a method for amplifier calibration involves amplifying an input signal using a first amplifier connected between an input terminal and an output terminal to generate an output signal and digitally performing offset calibration on a second amplifier coupled in parallel with the first amplifier between the input terminal and the output terminal while amplifying the input signal using the first amplifier. Other embodiments are also described.

Method and system for amplifier calibration

One example discloses a voltage reference, including: a bandgap circuit core having a first intermediate bandgap voltage output, a second intermediate bandgap voltage output, and a bandgap voltage reference output; an amplifier having a first input, a second input, an input offset, an output, and an input_offset_trim; a trim controller; a switch matrix coupled between the bandgap circuit, the amplifier and the trim controller; wherein the switch matrix has a functional configuration and a calibration configuration; wherein in the functional configuration of the switch matrix, the first intermediate bandgap voltage output is coupled to the first input of the amplifier and the second intermediate bandgap voltage output is coupled to the second input of the amplifier; and wherein in response to the calibration configuration of the switch matrix, the trim controller is coupled to adjust the input offset of the amplifier using the input_offset_trim.

Bandgap voltage reference

A fastener with a head element that is coupled to a strip element is disclosed. The strip element is configured to fasten to the head element via an attachment structure of the head element. An identification device is molded into the fastener. The identification device has an identifier integrated circuit (IC) within an IC package and an antenna, having a portion internal to the IC package and a portion extending out of the IC package, coupled to the identifier IC.

Fastener with embedded identifier circuit

An electronic device includes multiple functional logic modules each having a corresponding settling time, a clock generator element, and multiple memory elements. The clock generator element generates multiple clock signals having clock periods of a common duration. Each clock signal has a first clock transition and a second clock transition during each clock period, and a latest second clock transition of the clock signals in a particular clock period precedes an earliest first clock transition in a subsequent clock period by the settling time. Each memory element is clocked by a respective one of the clock signals, and each memory element includes an input latch clocked on a first clock transition of the respective one of the clock signals, and an output latch clocked on a second clock transition of the respective one of the clock signals.

Growing community of inventors

Someren, Netherlands

Henri Verhoeven