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Stmicroelectronics S.a.

Henri Banvillet

Yvon Gris

Germaine Troillard

Jean-Claude Oberlin

Jocelyne Mourier

Luc Liauzu

Emmanuel Perrin

Jos Guelen

Fr&eacute;d&eacute;ric Robert

Catherine Maddalon

Genevi&egrave;ve Lunardi

A method of manufacturing a capacitor includes the steps of depositing a first metal level and etching it to leave in place a region corresponding to a first plate of a capacitor and an area of contact with an upper level; depositing an insulating layer; forming a first opening above the first capacitor plate; depositing a thin insulating layer; forming a second opening above the contact area; depositing a second metal level; removing by physico-chemical etching the second metal layer outside regions where it fills up the openings; and depositing a third metal level and leaving in place portions thereof.

Method of formation of a capacitor on an integrated circuit

A process for polishing, on a polishing machine and under defined polishing conditions, the external surface of at least one wafer of integrated circuits comprising a projecting feature covered over the entire surface of the wafer with an external layer of a material, consisting in calculating a main equivalent thickness equal to the main surface density of the projecting feature multiplied by the thickness of the latter; in polishing, under the defined polishing conditions, a reference wafer comprising an external layer of the material, having a uniform thickness and covering the surface of this reference wafer, so as to determine the rate of removal by the polishing machine corresponding to the ratio of the thickness removed to the polishing time elapsed; in calculating a polishing time equal to the ratio of the aforementioned equivalent thickness to the aforementioned rate of removal; in calculating a total equivalent thickness equal to the sum of the main equivalent thickness and of a complementary thickness of preset value; in calculating a polishing time equal to the ratio of this total-equivalent thickness to the aforementioned rate of removal; and in carrying out, under the polishing conditions, the polishing operation on at least one wafer to be polished for a duration which is equal to the aforementioned polishing time or which depends on this time.

Process for polishing wafers of integrated circuits

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Froges, France

Henri Banvillet