Intel Corporation

Mellanox Technologies, Ltd.

Nvidia Corporation

Mellanox Technologies Tlv Ltd.

Mellanox Technologies Denmark Aps

Henning Lysdal

Barak Gafni

Paul J Weldon

Ruthie D Lyle

Barak Freedman

Bradley John Booth

Avner Badihi

Mark T Feuerstraeter

Nizan Meitav

Casper Dietrich

Benny Christensen

Eivind Johansen

Henrik Ingvar Johansen

Amir Silber

Michael Liere

Henrik Ingvart Johansen

A system including multiple processing devices such as application-specific integrated circuits (ASICs). Each processing device is provided with light at one or more wavelengths. Each processing device outputs data, at the wavelength of the optical signal received, to one or more interfaces. Each interface outputs a multiplexed signal containing data from each of the processing devices on a single optic fiber.

Systems and methods for optically connecting processing devices and interfaces

Various embodiments of silicon photonic (SiP) chips are provided that are configured for backside or frontside optical fiber coupling. An SiP chip includes a photonic integrated circuit formed on a first surface of a first substrate. The photonic integrated circuit includes at least one optical component and at least one coupling element. The at least one optical component is configured to propagate an optical signal therethrough in a waveguide propagation direction that is substantially parallel to a plane defined by the first surface. The at least one coupling element is configured to couple an optical signal propagating along an optical path transverse to the waveguide propagation direction into the at least one optical component to enable the backside or frontside coupling of an optical fiber to the SiP chip.

Backside fiber attachment to silicon photonics chip

An optical cable includes a single optical connector configured for insertion into an optical receptacle so as to receive optical signals at a plurality of different wavelengths from the optical receptacle, and multiple electrical connectors, configured for insertion into respective electrical receptacles. The optical cable further includes a plurality of optical fibers, having respective first ends connected together to the single optical connector so as to receive the optical signals. Each of the optical fibers has a respective second end coupled to a respective one of the electrical connectors. Each electrical connector includes a keyed portion to mate with an indentation on a transceiver.

Wavelength splitter cable with mechanical key

An optical cable includes a single optical connector configured for insertion into an optical receptacle so as to receive optical signals at a plurality of different wavelengths from the optical receptacle, and multiple electrical connectors, configured for insertion into respective electrical receptacles. Each electrical connector includes a transceiver configured to convert the optical signals into electrical output signals for output to an electrical receptacle. The optical cable further includes a plurality of optical fibers, having respective first ends connected together to the single optical connector so as to receive the optical signals. Each of the optical fibers has a respective second end coupled to a respective one of the electrical connectors. Wavelength selection optics are associated with the optical fibers so that the transceiver in each of the electrical connectors receives the optical signals at a different, respective one of the wavelengths.

Wavelength-splitting optical cable

Embodiments are disclosed for providing a silicon photonics collimator for wafer level assembly. An example apparatus includes a silicon photonics (SiP) device and a micro-optical passive element. The SiP device comprises a set of optical waveguides. The micro-optical passive element is mounted on an edge of a cavity etched into a silicon surface of the SiP device. Furthermore, the micro-optical passive element is configured to direct optical signals between the set of optical waveguides and an external optical element.

Silicon photonics collimator for wafer level assembly

In various examples, when a local user initiates an instance of a video conference application, the user may be provided with a user interface (UI) that displays an icon corresponding to the user as well as several other icons corresponding to participants in the instance of the video conference application. As the users converse, the local user may find that a particular participant is speaking loudly compared to the other remote users. The local user may then select an icon corresponding to the particular participant and move the icon away from the local user's icon in the UI. Based on moving the remote user's icon away from the local user's icon, the system may reduce the output volume of the audio data for the participant. Further, if the local user moves the participant icon closer to the local user's icon, the volume for the participant may be increased.

Volume control for audio and video conferencing applications

A laser module includes one or more connectors and a laser source. The one or more connectors are configured to receive electrical power from, and to output a light beam to, a panel of a system. The laser source is configured to (i) be powered by the electrical power, and (ii) produce the light beam using the electrical power. The one or more connectors and the laser source are detachable from the panel, and when detached from the panel, the laser source is not powered by the electrical power.

Pluggable laser module with improved safety

An apparatus and method for automatically detecting the port type of a remote device are disclosed. One embodiment of the apparatus includes a data rate detection unit to sample a data rate from an incoming data signal. A first frequency configuration unit is operatively coupled with the data rate detection unit to receive a detected data rate from the data rate detection unit. The apparatus also includes an oscillator to generate a plurality of reference clock frequencies. A frequency selector unit is coupled with the oscillator to select one of the reference clock frequencies. A phase lock unit to phase lock the incoming data signal is coupled with the first frequency configuration unit. A data rate select output is coupled with the first frequency configuration unit to operatively link the first frequency configuration unit with a second frequency configuration unit of a remote device.

Method and apparatus for autosensing LAN vs WAN to determine port type

According one embodiment, an apparatus and method are disclosed for a dynamic phase aligning input interface. In the embodiment, a first device provides data to a second device. According to the embodiment, the interface is counter clocked, the second device being clocked by a first clock signal and providing a second clock signal source to the first device for clocking the data. The first device transmits the second clock signal and the data to the second device, with the second clock signal being delayed by the period of time required for the second clock signal source to propagate through the first device. The second device detects the phase of the first clock signal and the second clock signal and modifies the phase of the second clock signal source to align the phase of the first clock signal and the phase of the second clock signal.

Dynamic phase aligning interface

A clock divider and method is disclosed for generating an output clock signal having a frequency that is a fractional or integral multiple of a reference clock signal frequency. In one embodiment, the clock divider divides a clock signal by a first divisor in a first period and by a second divisor in a second period, where the second period following the first period. The clock divider circuit is triggered by a first edge of the clock signal and generates a first signal. A synchronizing circuit is coupled to the clock divider to generate a second signal from the first signal, the second signal being synchronized by a second edge of the clock signal, where the second edge is in a direction opposite to the first edge. A selector is coupled to the synchronizing circuit and the clock divider to generate an output signal by selecting the first signal and the second signal alternately between the first period and the second period.

Generating non-integer clock division

A phase detector and corresponding method. The phase detector detects a transition of a first signal and generates an output signal having a first value if a transition of a second signal occurs before the transition of the first signal and having a second value if the transition of the second signal occurs after the transition of the first signal. The output signal is maintained at the generated value until another transition of the first signal is detected. A strobe signal may be used to strobe the output signal.

Phase detector

An integrated circuit for receiving and recovering an incoming electrical signal of a digital data bit stream transmitted over a communication channel, and comprising an equaliser circuit adapted to reshape the electrical signal to be provided to, a CDR circuit adapted to receive the reshaped electrical signal and to recover data bit signal of the digital bit stream and to recover a clock signal encoded or embedded in the digital data stream.

Growing community of inventors

Roskilde, Denmark

Henning Lysdal