U.S. Philips Corporation

Nxp B.v.

Koninklijke Philips Corporation N.v.

Datang Nxp Semiconductors Co., Ltd.

Hendrik Boezen

Abraham Klaas Van Den Heuvel

Patrick Willem Hubert Heuts

Ruurd Anne Visser

Aloysius Johannes Maria Boomkamp

Pieter Buitendijk

Rudolf W Mathijssen

Clemens Gerhardus Johannes De Haas

Henricus Cornelis Johannes Büthker

Stefan Gerhard Erich Butselaar

Harm Gerwin Joan Voss

Gerrit Jan Bollen

Martinus Bredius

Stefan Butzmann

Peter Fuhrmann

Wolfgang Otto Budde

Henricus Cornelis Johannes Buthker

Chandra Prakash Tiwari

Rameswor Shrestha

Harald Eisele

Marijn Nicolaas Van Dongen

Reinhard Buchhold

Cecilius Gerardus Kwakernaat

Peter Michael Buehring

Martijn Bredius

Thomas Stork

Chao Peng

Joop Petrus Maria Van Lammeren

Jacobus Adrianus Van Oevelen

Aloysius J Boomkamp

Martin Bredius

Lambertus H Geerdink

Arnoldus B Basten

Rafael A Goes

Jeroen A Gerlings

Frederik Mostert

Emiliano Mediavilla Pons

Egon Joehnk

Maarten Teunis Visser

Leonardus F P Warmerdam

Henricus Cornelis Johannes BÜTHKER

Emiliano Elias Mediavilla Pons

Abraham K Van Den Heuvel

A method for accurately measuring a battery temperature using a temperature sensor embodied in a battery monitoring integrated circuit is disclosed. The method includes performing calibration to estimate a thermal resistance between the battery monitoring integrated circuit and a terminal of a battery, measuring a temperature using the temperature sensor, measuring a voltage at the terminal or at a supply pin of the battery monitoring integrated circuit while a current is being used to charge or discharge the battery, calculating a power by multiplying the voltage and the current, and calculating a self-heating temperature adjustment to the temperature by multiplying the power and the thermal resistance.

Accurate battery temperature measurement by compensating self heating

For an LED lighting application, overshoot-protection circuitry prevents an LED controller, such as a matrix lighting controller (MLC) that controls an array of LEDs, from falsely detecting an open-circuit condition in an LED controlled by the LED controller, by limiting the magnitude of an overshoot voltage (due to long-wire parasitic inductances) from occurring when a switch in the LED controller that is used to control the LED is turned off.

Overshoot protection circuit for LED lighting

Embodiments are provided that include a light emitting diode (LED) controller connectable to a matrix of LEDs. A start code is received via at least one input pin, and a selected curve profile is retrieved from a programmable local memory in response to receipt of the start code, wherein the programmable local memory stores a set of curve profiles, each of which is associated with a different start code. A set of coefficients of a polynomial calculator are initialized to a set of values defined in the selected curve profile, wherein the set of values represent a light output curve. A sequence of light intensity values are calculated according to the polynomial calculator, and at least one pulse width modulation (PWM) signal is generated based on the sequence of light intensity values, wherein the at least one PWM signal controls light output of at least one LED.

Standalone light emitting diode (LED) controller

A controller for a power converter. The power converter comprises a converter-switch and a converter-inductor. The controller comprises a controller-output-terminal configured to provide a switch-control-signal for the converter-switch, a comparator and a delay-block. The comparator can provide a comparator-output-signal that has a comparator-output-state dependent on whether or not a sensed-signal is greater than a reference-signal, wherein the comparator-output-state can take a first-state-value or a second-state-value. The delay-block can: set a time-delay-value based on: (i) a voltage across the converter-inductor; start a timer when the comparator-output-state changes; and cause a change in the switch-control-signal when the timer reaches the time-delay-value.

Controller for a power converter

A method includes activating a transistor providing current to a load via an inductor based on values stored at a first timer and at a second timer. The second timer is enabled based a value of a current conducted at the inductor and based on a value of a reference current. The transistor is deactivated in response to determining that a measurement of time elapsed at the first timer is a predetermined multiple of the second measurement of time.

Discontinuous mode buck converter and method therefor

Systems and methods of use relate to a circuit that is designed to detect the state of two control signals, wherein one control signal indicates an ON state for the gate driver and the other control signal indicates an OFF state for the gate driver. The circuit responds to each of the control signals by controlling the gate driver so that it drives an output either high or low. The circuit can also be configured to control the gate driver so that it to drives the output (either high or low) when neither control signal is present.

Capacitive level shifter devices, methods and systems

An LED control circuit for controlling a current supplied to an LED unit is disclosed. A sense resistor is included for sensing an output current provided from an output node. A comparator circuit is provided for detecting upper and lower thresholds in the output current based on the voltages at ends of the sense resistor, and for controlling a current supply to maintain the current between the thresholds. The comparator circuit comprises a reference current source and reference resistors, for generating upper and lower threshold references. The comparator circuit further comprises a comparator for detecting a mid-range voltage dependent on the output current and deriving a control signal which indicates if the detected voltage is above or below the mid-range voltage. The control signal is used to adjust the reference current source, thereby to vary the upper and lower threshold references to maintain a constant median or average output current.

LED current control

LED driver arrangements are disclosed comprising: an input; a plurality of switched mode boost converters, each connected to the input; and a plurality of outputs, each output having a different voltage and being for driving at least one LED string; wherein each of the plurality of switched mode boost converters is configurable to output of any one of the plurality of outputs. Controllers for such arrangements are also disclosed.

Multi-channel LED driver arrangements

In one embodiment, a method of communicating data values over a three conductor interface is provided. Different data values are transmitted by generating and transmitting three respective signals to a receiver using three conductors. The first signal is maintained as a set voltage level. The second signal is alternated between a high voltage and a low voltage according to a carrier frequency. The third signal is alternated between the high and low voltages and is out of phased with the second signal. To transmit a first data value, the first signal is generated on a first conductor, the second signal is generated on a second conductor, and the third signal is generated on a third conductor. To transmit a second data value, the second signal is generated on the first conductor, the first signal is generated on the second conductor, and the third signal is generated on the third conductor.

Capacitive isolated voltage domains

In one or more embodiments, a circuit is configured to receive a differential signal from a transmitter that is isolated from the receiver circuit and that includes a common-mode suppression circuit and signal combining circuit coupled to the corresponding lines carrying the differential signals. The common-mode suppression and signal combining circuits are configured to suppress common-mode signals of differential signals communicated on the set of differential signal lines and combine to form of differential-mode components of the differential signals.

Common mode suppression circuit

The communication bus system comprises a plurality of node circuits (-) and a relay circuit () coupling the node circuits (-). The relay circuit () has a transceiver circuit () for relaying messages () between the node circuits (-) in a normal mode. The transceiver circuit () is powered down in a sleep mode. A detector circuit () detects an incoming message () when the relay circuit () is in a sleep mode. A mode control circuit () powers up the transceiver () in response to detection of an incoming message (). Steps are taken that ensure, in the normal mode, that messages () will not be relayed in unreadable form. The mode control circuit () is arranged to cause the transceiver () to relay a remainder () of the incoming message () after power up. In an embodiment the power needed to transmit the remainder () of the message () is drained from a capacitor () in the power supply () before the power supply () controls the power supply voltage in the normal mode. In another embodiment the detector circuit () temporarily controls the direction of operation of the transceivers () at the start of the normal mode instead of further detectors (-) that normally control the direction of operation in the normal mode.

Communication bus system operable in a sleep mode and a normal mode

A sensor () has an output coupled to a first comparator input. A control circuit () is arranged to switch from an upward tracking mode to a downward relative level detection mode, to a downward tracking mode, to an upward relative level detection mode and back to the upward tracking mode successively. A first and second digital to analog conversion circuit () receive a first and second digital control value from the control circuit () respectively. A controllable combiner circuit () has inputs coupled to outputs of the first and second digital to analog conversion circuits () and an output coupled to the second comparator input, the control circuit () having first output coupled to controllable combiner circuit () to cause the combiner circuit () to supply first and second combiner output signals determined by the first and second digital to analog conversion circuit () to the second comparator input in the upward and downward tracking mode respectively, and to supply a third combiner output signal corresponding to an average of the first and second combiner output signals to the second comparator input in the relative level detection modes. The control circuit () has an input coupled to the output of the comparator (), the control circuit () controlling one directional upward tracking by the first digital to analog conversion circuit () of upward changes of the sensing signal in the upward tracking mode, and controlling one directional downward tracking by the second digital to analog conversion circuit () Of downward changes of the sensing signal in the upward tracking mode.

Electronic sensing circuit that compensates for reference voltage drift

In a network a star node (SN) interconnects a plurality of stations (ST&#x2013;ST). The star node (SN) has interfaces (I&#x2013;I), each having a connection terminal (BP) for connecting a selected one of the stations to the star node (SN) and each interface receives at a connection terminal (BP) a signal from the station associated with that interface and forwards the received signal to the connection terminal (BP) of the other interfaces. The star node (SN) further has a common terminal (RT) and each interface has a receiver (CMP) coupled to the connection terminal (BP) for receiving the signal from the associated station, a transmitter (TR) coupled to the connection terminal (BP), a first activity detector (A) for generating a first activity signal (AS) in response to signal transitions at an input (CIP) of the receiver (CMP), a second activity detector (A) for generating a second activity signal (AS) in response to signal transitions at the common terminal (RT), a first switch (SW) for disabling signal transfer from the receiver (CMP) to the common terminal (RT) in response to the second activity signal (AS), and a second switch (SW) for disabling signal transfer from the common terminal (RT) to the transmitter (TR) in response to the first activity signal (AS). The structure of the interface allows easy expansion of the number of interfaces within the star node (SN) and a data protocol without a preamble.

Active switching star node and network of stations interconnected by such a star node

The invention relates to a network comprising a plurality of network nodes and one star node, which star node is provided for the direct coupling of at least two network nodes. The star node comprises a plurality of star interfaces which are assigned to at least one network node and which comprise each an activity detector for detecting activities in the message signal coming from the assigned network node and for transferring the message signal from the assigned network node to the other star interfaces or from another star interface to the assigned network node in dependence on at least one activity.

Activity detection in a star node with a plurality of coupled network nodes

Line driver for a LIN-bus. The line driver has a current source output transistor (T) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R). The output transistor (T) is driven by a driver stage (DRV) in response to an input current (J) at an input node (X). The driver stage has a further resistor (R) connected between the gate of the output transistor (T) and a reference terminal (GND), a reference transistor (T) which has its source connected to the reference terminal (GND) and its drain coupled to the input node (X); the gates of the output transistor (T) and the reference transistor (T) are connected to an output (DAO) of a differential amplifier (DA) which has an inverting input (DAN) coupled to a bias voltage source (E) and a non-inverting input (DAP) coupled to the input node (X). The further resistor (R) stage provides a low-impedance path to ground for RF disturbances reaching the gate of the output transistor (T) through the drain-gate capacitance of the output transistor (T) and prevents these disturbances from penetrating the driver stage.

Line driver with current source output and high immunity to RF signals

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Nijmegen, Netherlands

Hendrik Boezen