Cochlear Limited

Helmut Christian Eder

Paul Michael Carter

Tony M Nygard

David K Money

Christopher Newton Daly

Koen Van Herck

Dirk Arno Fiedler

Yashodhan V Moghe

Padraig Joseph Hurley

Michael Trieu

Van Herck Koen

Tony Mikeal Nygard

Presented herein are techniques for electronically locking an electronic device in response to detection of a safety critical fault. As used herein, a 'safety critical fault' is a fault having a potential to cause harm to an individual using the device. In particular, an electronic device in accordance with certain embodiments presented herein is configured to determine when the electronic device has experienced a safety critical fault. In response, the electronic device automatically restarts itself and, following restart, is automatically forced into a locked mode. The locked mode prevents execution of a run-time program stored in the electronic device.

Safety critical electronic device lock

An improved arrangement for detecting DC current leakage in implanted devices is disclosed. Currents are monitored, so that any unexpected imbalance indicates that a fault condition has occurred. The principle of the system is that if everything working correctly, the same current should be flowing into the tissue from VDDH-ELEC as is passing out of the tissue into VSS_ELEC. Any difference is indicative of current flowing into or out of the tissue from unknown paths, which is indicative of some fault. This replaces routine monitoring for specific faults.

Current leakage detection

An implantable component of a prosthesis comprising of at least one powered component; at least one antenna coil contained within an electrically insulating surround; and an electrical storage element for powering at least one powered component, the electrical storage element being positionable within a support area of the surround, the support area being at least partially within the area defined by the at least one antenna coil.

Removable implantable battery positioned inside implant coil

The invention provides a method of electrical artefact compensation in measurement of a neural response. The neural response is evoked by a first stimulus, after which a compensatory stimulus is applied in order to counteract a stimulus artefact caused by the first stimulus. The invention also provides for short circuiting the stimulating electrode subsequent to the first stimulus. A system for implementing such steps is also provided. The invention may be of application in measurement of physiological responses, including neural responses and in particular a neural response of the auditory nerve.

Minimization of electrical stimulus artifact during measurement of evoked neural response

A low-power, high-dynamic range, analog-to-digital (A/D) conversion circuit for converting an analog signal to a digital signal having a controllable amplifier for amplifying the analog signal received at an input of the amplifier in response to a first control signal and for generating an amplified analog signal, a low dynamic range A/D converter for converting the amplified analog signal to an intermediary digital signal, a controllable bit shift register for scaling the intermediary digital signal in response to a second control signal to generate the digital signal, and a gain control component (AGC) for generating the first control signal to cause the amplified analog signal to be within the dynamic range of the A/D converter and for generating the second control signal to cause the scaling to compensate for the amplification by the amplifier.

Analog to digital (A/D) conversion circuit having a low dynamic range A/D converter

A method and device for measuring an evoked neural response comprising a sensor () for obtaining a sensed signal representing the evoked neural response, a high gain amplifier () having a signal input () for receiving the sensed signal and having a reference input (), and means for altering or setting a reference voltage at the reference input () to prevent the amplifier () saturating with variations of the sensed signal.

Measurement of evoked neural response

A low-power, high-dynamic range, analog-to-digital (A/D) conversion circuit for converting an analog signal to a digital signal having a controllable amplifier for amplifying the analog log signal received at an input of the amplifier in response to a first control signal and for generating an amplified analog signal, a low dynamic range A/D converter for converting the amplified analog signal to an intermediary digital signal, a controllable bit shift register for scaling the intermediary digital signal in response to a second control signal to generate the digital signal, and a gain control component (AGC) for generating the first control signal to cause the amplified analog signal to be within the dynamic range of the A/D converter and for generating the second control signal to cause the scaling to compensate for the amplification by the amplifier.

Growing community of inventors

Castle Hill, Australia

Helmut Christian Eder