Cirrus Logic Inc.

Heling Yi

John L Melanson

Jason Powell Rhode

Timothy Thomas Rueger

Brian David Trotter

David M Olivenbaum

Thomas D Stein

A feedback noise-shaper of an order of at least three implements a first pole set defining a signal transfer function of a selected corner frequency and a second pole set having at least one pole at a frequency at least twice the selected corner frequency defining a noise transfer function.

Delta-sigma modulators with integral digital low-pass filtering

A delta-sigma modulator of an order of at least three having a signal transfer function defining a signal low-pass response, the signal transfer function has a numerator and a denominator, the denominator defined by a product of first and second functions defining respective first and second pole sets such that a roll-off frequency of a low-pass response defined by the first pole set is at least twice a roll-off frequency of a low-pass response defined by the second pole set. The delta-sigma modulator also has a noise transfer function defining a noise high-pass response, the noise transfer function having a numerator and a denominator, the denominator defined by the product of the first and second functions. The numerator of the noise transfer function differs from the numerator of the signal transfer function and characterizes the noise high-pass response.

An integrated circuit on a system board is used, for example, in a digital audio device (such as a DVD or A/V receiver). The integrated circuit includes a digital-to-analog converter and the system board may include circuitry to mute the analog output of the device under certain predefined conditions. Because it may not be known in advance by the designer of the integrated circuit whether the circuit is activated by a signal in a high state (polarity) or a low state, the integrated circuit includes a detector which detects and stores the required polarity. When it is necessary for the circuit to be activated, the detector provides a signal of the correct polarity.

Integrated circuit with automatic polarity detection and configuration

An apparatus and method for converting digital input signals sampled at different rates to analog signals includes a digital to analog converter for each digital input signal. Each digital to analog converter receives a digital input signal and a clock signal corresponding to the sampling rate of the received digital input signal. The apparatus can also receive a set of sample rate signals indicating the sampling rate for each digital input signal. The sample rate signals are used to route each digital input signal, along with a corresponding clock signal, to a corresponding digital to analog converter (DAC). A clock error signal controls routing of the digital input signals to the DACs as well as operation of the DACs. A clock divider and ratio detector module generates the clock error signal based on intermediate clock error signals that correspond to the sample rates.

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Austin, TX, United States of America

Heling Yi