Qualcomm Incorporated

Helena Deirdre O'Shea

Richard Dominic Wietfeldt

Lalan Jee Mishra

Wolfgang Roethig

ZhenQi Chen

Mohit Kishore Prasad

Amit Gil

Chuan Wang

Jafar Mohseni

David J Maldonado

Gary Chang

Scott Davenport

Ramakrishna Narayanaswami

Alberto Rico Alvarino

Aamod Dinkar Khandekar

Parvathanathan Subrahmanya

Daniel Fred Filipovic

Supratik Bhattacharjee

Todd Robert Sutton

Roland Reinhard Rick

Divaydeep Sikri

Frederic Bossu

Chih-Ping Hsu

Chiew-Guan Tan

Jifeng Geng

Christopher Kong Yee Chun

Prashanth Akula

Wilson Jianbo Chen

Christos Komninakis

Umesh Srikantiah

Gregory Lie

Garret Shih

Brian George

Chris M Rosolowski

Jianguo Yao

Nigel Phillip Robinson

Hans Georg Gruber

Philip J Children

Farrukh Rashid

Jason Alan Thurston

Hardik M Patel

Nicholas J Tebbit

Vidyut Naware

Kuei-Chiang Lai

Mohammad Jafar Mohseni

Cetin Altan

Haidong Zhu

Kaushik Ghosh

William Stancer

Rajagopal Jeenagala

Subra Dravida

Reza Mohammadpourrad

Ryan Milne

Vinay Jain

Christopher J Smith

Wolfram Pieperhoff

Jason Zhao

Faraz Faheem

Xiaoling Shen

Michel Mouna-Kingue

Certain aspects of the present disclosure relate to communication systems, and more particularly, to improving performance for sounding reference signal (SRS) antenna switching in carrier aggregation (CA). A method is provided, that may be performed by a user equipment (UE) for wireless communications. The method includes determining one or more band combinations that share an antenna switch and sending a list of one or more bands in the one or more band combinations to a base station (BS). The BS receives the list and schedules the UE based on the received list.

Methods and apparatus for SRS antenna switching in carrier aggregation

Disclosed aspects relate to methods and apparatus for coexistent radio frequency (RF) systems in a wireless device. Control of a wireless device includes detecting when a turn on signal is issued to a first radio system, and then controlling the second radio system to either modify the operation of receiver circuitry in the second radio system to protect components within that system, or modify transmit circuitry to stop transmissions for protecting components within one radio system potentially affected by transmission from the other radio system in the wireless device. Disclosed also is monitoring of transmission states of the radio systems based on reading messages between the first and second radio systems and issuing a notification message based thereon such that one of the radio systems may suspend monitoring of a transmit channel for permission to transmit in order to reduce power consumption due to such monitoring of the channel.

Controlling coexistent radio systems in a wireless device

Systems, methods, and apparatus for improving throughput of a serial bus are described. A method performed at a device coupled to a serial bus includes detecting a transition in signaling state of a first wire of the serial bus while a first pair of consecutive bits is being received from the first wire of the serial bus, determining that no transition in signaling state of the first wire occurred while a second pair of consecutive bits is being received from the first wire, defining bit values for the first pair of consecutive bits based on direction of the transition in signaling state detected while the first pair of consecutive bits is being received, and sampling the signaling state of the first wire while the second pair of consecutive bits is being received to obtain a bit value used to represent both bits in the second pair of consecutive bits.

Vector decoding in time-constrained double data rate interface

Systems, methods, and apparatus for transmitting additional information over a synchronous serial bus are described. A method performed at a transmitting device coupled to the serial bus includes providing first data in a data signal to be transmitted on a first wire of a multi-wire serial bus, providing a series of pulses in a clock signal to be transmitted on a second wire of a multi-wire serial bus, where each pulse has a rising edge and a falling edge, each edge being aligned with a different bit of the first data. The method may include encoding second data in the clock signal by controlling a duration of each pulse in the series of pulses based on a value of one or more bits of the second data, and transmitting the data signal and the clock signal over the serial bus.

Triple-data-rate technique for a synchronous link

Systems, methods, and apparatus for internal on-chip clock calibration for devices coupled to a serial bus are described. A data line of the bus is monitored at a device in order to detect select command signals on the data line, where the select command signals have an accompanying clock signal, such as a burst clock, on a clock line of the serial bus sent concurrently with the command signal. The internal on-chip clock generator in the receiving device utilizes the clock signal occurring with the command signal for calibration, where the select signals are those signals sufficiently long enough for a receiving device to effectively utilize the concurrent clock signal for calibration purposes. In this manner, clock calibration for an internal clock is maintained accurately without the need for an extra clock calibration input.

On-chip clock generator calibration

Systems, methods, and apparatus for data communication are provided. A method performed by a bus master includes terminating transmission of a first datagram by signaling a first bus park cycle on a serial bus, causing a driver to enter a high-impedance state, opening an interrupt window by providing a first edge in a clock signal transmitted on a second line of the serial bus, closing the interrupt window by providing a second edge in the clock signal, signaling a second bus park cycle on the serial bus, initiating an arbitration process when an interrupt was received on the first line of the serial bus while the interrupt window was open, and initiating a transmission of a second datagram when an interrupt was not received on the first line of the serial bus while the interrupt window was open.

Asynchronous interrupt with synchronous polling and inhibit options on an RFFE bus

An aspect of the present disclosure includes methods, systems, and computer-readable media for triggering the single signal during the first buffer period to concurrently adjust a first plurality of gain states of a first plurality of low-noise amplifiers associated with a first expected reception of the first symbol on the first component carrier and a second plurality of gain states of a second plurality of low-noise amplifiers associated with a second expected reception of the second symbol on the second component carrier, and receiving the first symbol via the first component carrier and the second symbol via the second component carrier after the first buffer period.

Methods and apparatus for dynamic adjustment of amplifier gain

Systems, methods, and apparatus are described that provide for communicating coexistence messages over a multi-drop serial bus. A data communication method includes configuring a common memory map at each of a plurality of devices coupled to a serial bus, receiving at a first device coupled to the serial bus, first coexistence information directed to a second device coupled to the serial bus, generating at the first device, a coexistence message that includes the first coexistence information, and transmitting the coexistence message to the second device over the serial bus. The first coexistence information in the coexistence message may be addressed to a location in the common memory map calculated based on a destination address associated with the first coexistence information and a unique identifier of the first device.

Function-specific communication on a multi-drop bus for coexistence management

Systems, methods, and apparatus for functionally extending a capability of a write datagram for RFFE and SPMI devices are provided. A sending device sets a configuration register to indicate an operation mode of a write command and generates a command code field in the write command. A most significant bit of the command code field has a value of 1 and remaining bits of the command code field are defined based on the operation mode. The sending device further includes payload bytes in a payload field of the write command based on the operation mode and sends the write command to a receiver via a bus interface. The sending device may also set a page-address register to include a page-address to be used if page segmented access (PSA) is enabled for the write command and set the configuration register to indicate whether the PSA for the write command is enabled.

Technique for RFFE and SPMI register-0 write datagram functional extension

Systems, methods, and apparatus for data communication are provided. A method performed by a device operating as a bus master may include transmitting a first pulse on a first wire of a multi-wire interface, transmitting a second pulse on a second wire of the multi-wire interface while the first pulse is present on the first wire of the multi-wire interface, and initiating a low-latency mode of communication immediately after termination of the first pulse. The second pulse may be shorter in duration than the first pulse.

Ultra-short RFFE datagrams for latency sensitive radio frequency front-end

In a device comprising a serial bus and a plurality of devices, register/address mappings and/or unique group identifiers are used to convey additional information in messages/datagrams over the serial bus without explicitly sending such information in the message/datagram. Such register/address mappings may be done beforehand, and in conjunction with group-specific identifiers, may reduce transmission latency by keeping the size of the messages/datagrams small. Since all devices on the serial bus have prior knowledge of such register/address mappings and/or group-specific identifiers, recipient devices are able to infer information from the group-specific identifiers and/or register/address sent in each message/datagram that is not explicitly sent within such message/datagram.

Efficient technique for communicating between devices over a multi-drop bus

Methods and apparatuses are described that facilitate data communication between a first slave device and a second slave device across a serial bus interface. In one configuration, a master device receives, from a first slave device, a request to send a masked-write datagram to a second slave device via a bus, wherein the masked-write datagram is addressed to a radio frequency front end (RFFE) register of the second slave device. The masked-write datagram includes a mask field identifying at least one bit to be changed in the RFFE register and a data field providing a value of the at least one bit to be changed in the RFFE register. The master device detects whether the first slave device is authorized to send the masked-write datagram to the second slave device and permits the first slave device to send the masked-write datagram to the second slave device if authorization is detected.

Radio frequency front end devices with masked write

Systems, methods, and apparatus for data communication are provided. An apparatus maybe configured to generate a mask field in a packet to be transmitted through an interface to a slave device, the mask field having a first number of bits, provide a control-bit field in the packet, the control-bit field having a second number of bits, where the second number of bits is less than the first number of bits, and transmit the packet through the interface. The packet may be addressed to a control register of the slave device. The control register may have the first number of bits. Each bit in the control-bit field may correspond to a bit of the control register that is identified by the mask field.

Full-mask partial-bit-field (FM-PBF) technique for latency sensitive masked-write

Exemplary embodiments are related to enhancing power efficiency of an electronic device. A device may include a power management module and a radio-frequency (RF) module coupled to the power management module. The device may further include a digital module coupled to each of the power management module and the RF module and configured to dynamically adjust at least one setting of the power management module based on one or more RF conditions.

Dynamic power management control

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San Diego, CA, United States of America

Helena Deirdre O'Shea