Siemens Aktiengesellschaft

Heinz Hebbeker

Dominique Savignac

Werner Reczek

Hartmud Terletzki

Helmold Kausche

A parasitic field effect transistor or a parasitic diode is formed in an integrated circuit. The parasitic element is formed by two doped regions of the same or opposite conductivity type and an insulating region therebetween. The doped regions are each connected to a respective terminal pad of the integrated circuit. To increase the ESD strength, the length of the insulating region in the lateral direction is greater than or equal to a length of the longest discharge path of the ESD protection structures connected to the terminal pads.

Integrated circuit with ESD protection

A fuse bank includes a fuse link being disposed above and insulated from a substrate. A first doped region in the substrate is a guard ring surrounding the fuse link. A second doped region has the same conduction type as the first doped region and is adjacent the first doped region. An insulation separates the second doped region from the first doped region. A high-impedance semiconductor component connects the first doped region to a first supply potential. The second doped region is connected to a second supply potential.

Fuse bank

An RC network is disclosed in which two electrically conducting regions and a dielectric lying between these regions form a capacitor. At least one of the electrically conducting regions consists of resistance material and is designed in the shape of a meandering path. This network can be balanced while still guaranteeing a uniform region distribution of the resistance and the capacitance, by means of a laser beam. Upon a carrier of heat-resistant material, a resistance layer, a dielectric of glow discharge polymer, and an opposite electrode capable of regeneration, are applied. The dielectric completely covers the resistance layer with the exception of contact pads.

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Bayersoien, Germany

Heinz Hebbeker