Samsung Electronics Co., Ltd.

Seoul National University

Heewon Kim

Seon Min Rhee

Jaejoon Han

Jihye Kim

Seungju Han

Ju Hwan Song

Gyuho Kang

Jongseok Kim

Jongho Park

Byung In Yoo

Ju-Il Choi

Youngjun Kwak

Minsu Ko

Youngsung Kim

Junyoung Park

Unbyoung Kang

Jiho Choi

Yong-Il Lee

Sechul Park

Hyong Euk Lee

Sangwan Nam

Jeonggi Jin

Jin Ho An

Jumyong Park

Junyoung Ko

Hyunsu Hwang

Kinam Kwon

Hyojin Yun

Juil Choi

Kyoung Mu Lee

Seong-Hoon Bae

Juhwan Song

Youse Kim

A method with image processing includes: generating a first surface normal image comprising surface normal vectors corresponding to pixels of a first depth image; and applying the first depth image and the first surface normal image to a first neural network, and acquiring a second depth image by changing the first depth image using the first neural network. The first neural network generates the second depth image to have an improved quality compared to the first depth image, based on an embedding vector that comprises a feature of the first depth image and a feature of the first surface normal image.

Method and apparatus with image processing for processing depth images

A semiconductor package includes a first semiconductor chip on a base chip, a second semiconductor chip on the first semiconductor chip in a first direction, each of the first and second semiconductor chips including a TSV and being electrically connected to each other via the TSV, dam structures on the base chip and surrounding a periphery of the first semiconductor chip, a first adhesive film between the base chip and the first semiconductor chip, a portion of the first adhesive film filling a space between the first semiconductor chip and the dam structures, a second adhesive film between the first semiconductor chip and the second semiconductor chip, a portion of the second adhesive film overlapping the dam structures in the first direction, and an encapsulant encapsulating a portion of each of the dam structures, the first semiconductor chip, and the second semiconductor chip.

Semiconductor package

A method with image restoration includes: receiving an input image and a first task vector indicating a first image effect among candidate image effects; extracting a common feature shared by the candidate image effects from the input image, based on a task-agnostic architecture of a source neural network; and restoring the common feature to a first restoration image corresponding to the first image effect, based on a task-specific architecture of the source neural network and the first task vector.

Method and apparatus with image restoration

A processor-implemented method includes generating a preprocessed infrared (IR) image by performing first preprocessing based on an IR image including an object; generating a preprocessed depth image by performing second preprocessing based on a depth image including the object; and determining whether the object is a genuine object based on the preprocessed IR image and the preprocessed depth image.

Method and apparatus with liveness test and/or biometric authentication

An image processing method includes receiving an input image and a guide image corresponding to the input image, extracting informative features from the input image and the guide image to enhance the input image, selectively obtaining a first feature for the input image from among the informative features, and processing the input image based on the first feature.

Image processing method and image processing apparatus

A method and apparatus for generating a depth image are provided. The apparatus receives an input image, extracts a feature corresponding to the input image, generates features for each depth resolution by decoding the feature using decoders corresponding to different depth resolutions, estimates probability distributions for each depth resolution by progressively refining the features for each depth resolution, and generates a target depth image corresponding to the input image based on a final estimated probability distribution from among the probability distributions for each depth resolution.

Method and apparatus for generating depth image

Provided is a non-volatile memory device. The non-volatile memory device includes: a memory cell array including cell strings, each including memory cells respectively connected to word lines; a page buffer circuit including page buffers respectively connected to the memory cells through bit lines, wherein a first page buffer is connected to a first cell string through a first bit line; a control logic circuit configured to control a pre-sensing operation to disconnect the first bit line and the first cell string from each other during a pre-sensing period for detecting a defect of the first bit line and control a post-sensing operation to connect the first bit line and the first cell string to each other in a post-sensing period for detecting defects of the word lines and the first bit line; and a defect detection circuit configured to detect defects of the word lines based the sensing operations.

Non-volatile memory device for detecting defects of bit lines and word lines

A user authentication method and a user authentication apparatus acquire an input image including a frontalized face of a user, calculate a confidence map including confidence values, for authenticating the user, corresponding to pixels with values maintained in a depth image of the frontalized face of the user among pixels included in the input image, extract a second feature vector from a second image generated based on the input image and the confidence map, acquire a first feature vector corresponding to an enrolled image, and perform authentication of the user based on a correlation between the first feature vector and the second feature vector.

User authentication apparatus, user authentication method and training method for user authentication

Disclosed is a semiconductor package comprising an interposer substrate having first and second surfaces opposite each other and including a wiring layer adjacent to the first surface, a semiconductor chip on the first surface of the interposer substrate, a passivation layer on the first surface of the interposer substrate and covering the semiconductor chip, and redistribution patterns in the passivation layer and connected to the semiconductor chip. The semiconductor chip has third and fourth surfaces opposite to each other. The third surface of the semiconductor chip faces the first surface of the interposer substrate. The redistribution patterns are connected to the fourth surface of the semiconductor chip. The semiconductor chip includes chip pads adjacent to the third surface and chip through electrodes connected to the chip pads. Each of the chip pads is directly bonded to a corresponding one of wiring patterns in the wiring layer.

A semiconductor package device may include a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern, which includes including a body portion and a protruding portion extended from the body portion to form a single object, an insulating layer covering a side surface of the body portion, and an outer coupling terminal on the protruding portion. The body portion may have a first diameter in a first direction parallel to the top surface of the redistribution substrate, and the protruding portion may have a second diameter in the first direction, which is smaller than the first diameter. A top surface of the protruding portion may be parallel to the first direction, and a side surface of the protruding portion may be inclined at an angle to a top surface of the body portion.

Semiconductor package device

A semiconductor chip includes: a semiconductor substrate; a pad insulating layer on the semiconductor substrate; a through electrode which penetrates the semiconductor substrate and the pad insulating layer and includes a conductive plug and a conductive barrier layer surrounding a sidewall of the conductive plug; and a bonding pad which surrounds a sidewall of the through electrode and is spaced apart from the conductive plug with the conductive barrier layer disposed therebetween.

Semiconductor chip having a through electrode and semiconductor package including the semiconductor chip

A processor-implemented method includes: generating a preprocessed infrared (IR) image by performing first preprocessing based on an IR image including an object; generating a preprocessed depth image by performing second preprocessing based on a depth image including the object; and determining whether the object is a genuine object based on the preprocessed IR image and the preprocessed depth image.

Growing community of inventors

Seoul, South Korea

Heewon Kim