Lg Display Co., Ltd.

Hee-Jung Yang

Won-Joon Ho

Gyu-Won Han

Dong-Sun Kim

Woo-Sup Shin

Jae-Young Jeong

Hyung-Tae Kim

A-Ra Kim

Min-Geun Choi

So-Young Jo

Yong-Hoon Choi

Soo-Kang Kim

Dong-sun Kim

Du-Seok Oh

An organic light emitting display device includes a substrate including a white pixel region, a blue color filter pattern in a first region of the white pixel region, an overcoat layer covering the blue color filer pattern and including a micro-lens, a first electrode on the overcoat layer, an organic emitting layer covering the first electrode, and a second electrode covering the organic emitting layer.

Organic light emitting display device

An organic light-emitting display device protects a first electrode and reduces any effect due to light leakage from the top or the peripheral side of a bank, thereby increasing lifespan. The organic light-emitting display device includes a first electrode protective pattern.

Organic light-emitting display device

Disclosed are an organic light-emitting display device and a method of manufacturing the same. The organic light-emitting display device includes a thin-film transistor including source and drain electrodes, a first electrode formed by extending the source or drain electrode, a passivation layer and a bank insulation layer on the thin-film transistor configured to expose the first electrode so as to define an emission area, an organic light-emitting layer provided on the first electrode, and a second electrode configured to cover the organic light-emitting layer. The source or drain electrode includes a plurality of layers and the first electrode is integrally formed with any one layer portion of the source or drain electrode.

Organic light-emitting display device and method of manufacturing the same

A method of fabricating an array substrate including forming an oxide semiconductor layer on a substrate; sequentially forming a gate insulating layer and a gate electrode corresponding to a central portion of the oxide semiconductor layer; forming source and drain areas having conductive properties in the oxide semiconductor layer by irradiating X-rays or UV rays to the oxide semiconductor layer exposed outside the gate electrode; forming an inter insulating layer on the gate electrode and having first contact holes that expose the source and drain areas; and forming source and drain electrodes on the inter insulating layer and contacting the source and drain areas through the first contact holes, respectively.

Method of fabricating array substrate

A method of fabrication an array substrate which includes foaming an oxide semiconductor layer on a substrate; forming a gate insulating layer corresponding to a central portion of the oxide semiconductor layer; forming a first reactive metallic pattern and second reactive metallic patterns on the gate insulating layer and portions of the oxide semiconductor layer exposed outside the gate insulating layer, respectively; forming a gate electrode on the first reactive metallic pattern; forming source and drain areas having conductive properties in the oxide semiconductor layer by performing heat treatment such that materials of the second reactive metallic patterns are diffused into the oxide semiconductor layer contacting the second reactive metallic patterns; forming an inter insulating layer on the gate electrode and having first contact holes that expose the second reactive metallic patterns; and forming source and drain electrodes on the inter insulating layer and contacting the second reactive metallic patterns through the first contact holes, respectively.

A method of fabrication an array substrate includes forming an oxide semiconductor layer on a substrate; sequentially forming a gate insulating layer and a gate electrode corresponding to a central portion of the oxide semiconductor layer; forming source and drain areas having conductive properties in the oxide semiconductor layer by performing hydrogen plasma treatment; forming barrier layers on the source and drain areas, the barrier layer having a first thickness; forming an inter insulating layer on the gate electrode and having first contact holes that expose the barrier layers; and forming source and drain electrodes on the inter insulating layer and contacting the barrier layers through the first contact holes, respectively.

An oxide thin film transistor (TFT) includes an oxide semiconductor layer including a first semiconductor layer and a second semiconductor layer on the first semiconductor layer; a gate insulating layer on the oxide semiconductor layer; a gate electrode on the gate insulating layer; an interlayer insulating layer on the gate electrode; and a source electrode and a drain electrode on the interlayer insulating layer and contacting the oxide semiconductor layer, wherein a first reflectance of the first semiconductor layer is greater than a second semiconductor layer.

Thin film transistor with oxide semiconductor having a portion with increased reflectance

An array substrate including: a gate barrier layer on a substrate; a gate line on the gate barrier layer, the gate line having a gate open portion exposing the gate barrier layer in a gate electrode region; a gate insulating layer on the gate line; an active layer on the gate insulating layer over the gate barrier layer in the gate electrode region; and source and drain electrodes spaced apart from each other on the active layer.

Array substrate including oxide thin film transistor and method of fabricating the same

A low-resistance wiring structure and a liquid crystal display are disclosed. The liquid crystal display includes a first substrate; a thin film transistor (TFT) formed on the first substrate and formed of a gate wiring, a data wiring and a semiconductor layer; and a second substrate attached to the first substrate in a facing manner, wherein at least one of the gate wiring and the data wiring is formed as a first wiring made of copper, a second wiring made of a barrier metal preventing spreading of copper, and a metal oxide film pattern formed between the first and second wirings. A MO/Cu wiring structure is implemented by using pure molybdenum, so that the low-resistance wiring structure with high reliability can be formed at a low cost.

Low resistance wiring structure and liquid crystal display device using the same

According to an embodiment, a method of fabricating a thin film transistor comprises forming a gate electrode on a substrate; forming a gate insulating layer on the gate electrode; forming a semiconductor layer on the gate insulating layer, the semiconductor layer corresponding to the gate electrode; forming first and second barrier patterns on the semiconductor layer, the first and second barrier patterns including copper nitride; and forming source and drain electrodes on the first and second barrier patterns, respectively, the source and drain electrodes including pure copper.

Growing community of inventors

Gyeonggi-do, South Korea

Hee-Jung Yang