Samsung Electronics Co., Ltd.

Ovonyx Inc.

Hee-Ju Shin

Han-Bong Ko

Bong-jin Kuh

Yong-Ho Ha

Doo-Hwan Park

Woo-Jin Kim

Sang-Wook Lim

Se-Chung Oh

Young-Hyun Kim

Jun-ho Jeong

Jae-Hoon Kim

Jang-Eun Lee

Jeong-Heon Park

Soon-Oh Park

Hyeong-Geun An

Yun-Jae Lee

Joon-Myoung Lee

Stephen J Hudgens

Hideki Horii

Ik-Soo Kim

Dong-Hyun Im

Yong-Hwan Ryu

Dong-ho Ahn

Sung-Lae Cho

Jong-Chan Shin

Eun-Hee Cho

Ki-Woong Kim

Jonathan D Maimon

Carl Schell

Jin-ho Oh

Woo-chang Lim

Sang-hwan Park

Ung-Hwan Pi

Ki-woong Kim

An MRAM device includes a first conductive pattern including a material generating a spin orbital torque, a torque transfer pattern contacting a portion of an upper surface of the first conductive pattern, an insulation pattern on a side of the torque transfer pattern and covering the first conductive pattern, and a magnetic tunnel junction (MTJ) structure on the torque transfer pattern, the MTJ structure including a free layer pattern, a tunnel barrier pattern, and a fixed layer pattern sequentially stacked.

Magnetoresistive random access memory device and method of manufacturing the same

A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.

Semiconductor device having pinned layer with enhanced thermal endurance

A magnetic device can include a tunnel bather and a hybrid magnetization layer disposed adjacent the tunnel barrier. The hybrid magnetization layer can include a first perpendicular magnetic anisotropy (PMA) layer, a second PMA layer, and an amorphous blocking layer disposed between the first and second PMA layers. The first PMA layer can include a multi-layer film in which a first layer formed of Co and a second layer formed of Pt or Pd are alternately stacked. A first dopant formed of an element different from those of the first and second layers can also be included in the first PMA layer. The second PMA layer can be disposed between the first PMA layer and the tunnel barrier, and can include at least one element selected from a group consisting of Co, Fe, and Ni.

Magnetic device

A magnetic memory layer and a magnetic memory device including the same, the magnetic memory layer including a first seed layer; a second seed layer on the first seed layer, the second seed layer grown according to a &#x3c;002&#x3e; crystal direction with respect to a surface of the first seed layer; and a main magnetic layer on the second seed layer, the main magnetic layer grown according to the &#x3c;002&#x3e; crystal direction with respect to a surface of the second seed layer.

Magnetic memory layer and magnetic memory device including the same

A method of fabricating a magnetic tunnel junction structure includes forming a magnetic tunnel junction layer on a substrate. A mask pattern is formed on a region of the second magnetic layer. A magnetic tunnel junction layer pattern and a sidewall dielectric layer pattern on at least one sidewall of the magnetic tunnel junction layer pattern are formed by performing at least one etch process and at least one oxidation process multiple times. The at least one etch process may include a first etch process to etch a portion of the magnetic tunnel junction layer using an inert gas and the mask pattern to form a first etch product. The at least one oxidation process may include a first oxidation process to oxidize the first etch product attached on an etched side of the magnetic tunnel junction layer.

Method for forming magnetic tunnel junction structure and method for forming magnetic random access memory using the same

A non-volatile memory device includes a plurality of word lines, a plurality of bit lines, and an array of variable resistance memory cells each electrically connected between a respective word line and a respective bit line. Each of the memory cells includes first and second resistance variable patterns electrically connected in series between first and second electrodes. A material composition of the first resistance variable pattern is different than a material composition of the second resistance variable pattern. Multi-bit data states of each memory cell are defined by a contiguous increase in size of a programmable high-resistance volume within the first and second resistance variable patterns.

Memory cells including resistance variable material patterns of different compositions

A method of manufacturing a phase-change memory device comprises forming a contact region on a substrate, forming a lower electrode electrically connected to the contact region, forming a phase-change material layer on the lower electrode using a chalcogenide compound target including carbon and metal, or carbon, nitrogen and metal, and forming an upper electrode on the phase-change material layer.

Methods for manufacturing a phase-change memory device

An example embodiment relates to a method of forming a pattern structure, including forming an object layer on a substrate, and forming a hard mask on the object layer. A plasma reactive etching process is performed on the object layer using an etching gas including a fluorine containing gas and ammonia (NH) gas together with oxygen gas to form a pattern. The oxygen gas is used for suppressing the removal of the hard mask during the etching process.

Methods of forming pattern structures

A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by SnSbTeor, alternatively with substitutions, in whole or in part, of silicon and/or indium for tin, arsenic and/or bismuth for antimony, and selenium for tellurium; and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer. Here, 0.001&#x2266;X&#x2266;0.3, 0.001&#x2266;Y&#x2266;0.8, 0.1&#x2266;Z&#x2266;0.8, and X+Y+Z=1.

Non-volatile memory device including phase-change material

In a method of forming a chalcogenide compound target, a first powder including germanium carbide or germanium is prepared, and a second powder including antimony carbide or antimony is prepared. A third powder including tellurium carbide or tellurium is prepared. A powder mixture is formed by mixing the first to the third powders. After a shaped is formed body by molding the powder mixture. The chalcogenide compound target is obtained by sintering the powder mixture. The chalcogenide compound target may include a chalcogenide compound that contains carbon and metal, or carbon, metal and nitrogen considering contents of carbon, metal and nitrogen, so that a phase-change material layer formed using the chalcogenide compound target may stable phase transition, enhanced crystallized temperature and increased resistance. A phase-change memory device including the phase-change material layer may have reduced set resistance and driving current while improving durability and sensing margin.

A nonvolatile memory device, including a lower electrode on a semiconductor substrate, a phase change material pattern on the lower electrode, an adhesion pattern on the phase change material pattern and an upper electrode on the adhesion pattern, wherein the adhesion pattern includes a conductor including nitrogen.

Nonvolatile memory device and method of manufacturing the same

A phase-change memory device includes a substrate having a contact region, an insulating interlayer on the substrate, a lower electrode electrically connected to the contact region, a phase-change material layer pattern formed on the lower electrode, and an upper electrode formed on the phase-change material layer pattern. The phase-change material layer pattern includes a chalcogenide compound doped with carbon and at least one of nitrogen and metal. The phase-change memory device may have a considerably reduced driving current without increasing a set resistance thereof. Further, the phase-change material layer pattern may have an increased crystallization temperature so as to ensure improved data retention characteristics of the phase-change memory device.

Phase-change material layer and phase-change memory device including the phase-change material layer

Method of forming a chalcogenide compound target

In a semiconductor memory device and a method of manufacturing the same, an insulating layer is formed on a substrate having a logic region on which a first pad is provided and a cell region on which a second pad and a lower electrode are subsequently provided. The insulating layer is etched to be a first insulating layer pattern having a first opening exposing the first pad. A first plug is formed in the first opening. The first insulating layer pattern where the first plug is formed is etched to be a second insulating layer pattern having a second opening exposing the lower electrode. A second plug including a phase-changeable material is formed in the second opening. A conductive wire and an upper electrode are formed on the first plug and the second plug, respectively.

Growing community of inventors

Yongin-si, South Korea

Hee-Ju Shin