Electronics and Telecommunications Research Institute

Other

Hee Bum Jung

Ik Soo Eo

Kyung Soo Kim

Han Jin Cho

Won Chul Song

Chang Jun Oh

Jong Dae Kim

Hyun Kyu Yu

In Gi Lim

Jong Kee Kwon

Young Hoon Kim

Nak Woong Eum

Bhum Cheol Lee

Kyung Jin Byun

Cheon Soo Kim

Mun Yang Park

Soon Il Yeo

Hyung Il Park

Bong Soo Kim

Seong Do Kim

Ook Kim

Tae Joon Kim

Suk Ho Lee

Kyoung Seon Shin

Ig Kyun Kim

Jong Ryul Lee

Myung Shin Kwak

Kwon Chul Park

Tae Young Lim

Seok Youl Kang

A method for stable channel estimation to increase frequency band efficiency that is lost by using a pilot, and to reduce the complexity and the sensitivity to channel zero. The method includes generating an i-th symbol block Sincluding N carriers, performing an inverse fast Fourier transform (IFFT) operation on the i-th symbol block, and forming an orthogonal frequency division multiplexing (OFDM) symbol block. The method also includes attaching a guard interval sample in front of the i-th OFDM symbol block Uand forming at least one OFDM symbol block U. The method further includes modeling the formed OFDM symbol block Uwith a channel finite impulse response (FIR) filter and estimating channel impulse response using signals yi received through a channel.

Blind channel estimation in an orthogonal frequency division multiplexing system

Provided is a method for converting a dimension of a vector. The vector dimension conversion method for vector quantization includes the steps of: extracting a specific parameter having a pitch period from an input speech signal and then generating a vector of a dimension that varies according to the pitch period; dividing an entire frequency domain of the generated vector of the variable dimension into at least two frequency domains; and converting the vector of the variable dimension into vectors of mutually different fixed dimensions according to the divided frequency domains. Thereby, not only an error due to the vector dimension conversion is suppressed but codebook memory required for the vector quantization is effectively reduced.

Method for reducing decoder complexity in waveform interpolation speech decoding by converting dimension of vector

Provided are an IMDCT co-processor and an audio decoder having the same. The IMDCT co-processor includes: an input buffer for storing an input inverse-quantized frequency spectrum sample value; an I/Q separator for dividing the sample value stored in the input buffer into real data I and imaginary data Q; a first operation unit for performing complex-multiplication on the data divided by the I/Q separator and a given twiddle factor; an IFFT unit for performing an inverse fast Fourier transform on the operation result value of the first operation unit; a second operation unit for performing complex-multiplication on the result value from the IFFT unit and a given twiddle factor; a deinterleaver for receiving the operation result value from the second operation unit to arrange data and performing inverse-mapping on a positive value (+) and a negative value (&#x2212;) of a certain portion of the data to each other to output a final IMDCT time sample value; and a control register for selecting the input inverse-quantized frequency spectrum sample value according to a given window sequence value to determine the final IMDCT time sample value.

Inverse modified discrete cosine transform (IMDCT) co-processor and audio decoder having the same

A coplanar waveguide CPW using multi-layer interconnection CMOS technology is provided. In the CPW including an interlayer insulator disposed on a substrate, metal multilayers disposed on the interlayer insulator, and a ground line-a signal line-a ground line formed of an uppermost metal layer, when a ground line of a lowermost layer is connected to the ground line of the uppermost layer, intermediate metal layers are designed to gradually increase or decrease in width, or to be uneven so as to maximize an area where an ultra-high frequency spreads, thereby minimizing CPW loss and maximizing a slow wave effect. As a result, it is possible to improve performance of an ultra-high frequency circuit and miniaturize the circuit.

Multi-metal coplanar waveguide

Provided is an apparatus for controlling multiple powers which is capable of turning on and off the multiple powers in their priorities for systems or components to be supplied with the multiple powers such as a liquid crystal display (LCD) module. In the apparatus for controlling multiple powers, an on-signal of high level is applied to an input terminal, and an output of a control signal generating unit is sequentially changed to a high level whenever a clock is applied to a clock signal input terminal by one period, so that outputs of the multiple powers are sequentially output. In addition, an off signal of low level is applied to the input terminal, and an output of the control signal generating unit is changed to a low level in a reversal order whenever a clock is applied to the clock signal input terminal by one period, so that outputs of the multiple powers are interrupted in the reversal order.

Apparatus for sequentially enabling and disabling multiple powers

A region searcher, a method of driving the same, and a code searcher using the same are disclosed. When a predetermined region is iteratively searched, the energy value corresponding to the same hypothesis location value is stored by using a searcher having divided two buffers, thereby the implementation complexity thereof can be remarkably reduced, without using a simple memory. In addition, in case where the region is iteratively searched in the state of the deteriorated signal-to-noise ratio to find the energy value at one hypothesis location and in case where the region must be iteratively searched because of the restriction which the size of the matched filter can be not increased, the implementation complexity thereof can be remarkably reduced.

Region searcher and method of driving the same and code searcher using the same

Provided is a normalizing apparatus for adaptive beamforming by performing a normalizing process which uses a normalized least mean square (NLMS) algorithm that produces a weight vector for adaptive beamforming, in a smart antenna receiver. For the normalizing process, the normalizing apparatus includes a multiplication operation means that performs a multiplication operation, and a division operation means that performs a division operation using mathematic calculations based on binary logarithm principles, and using addition and subtraction operations.

Normalizing apparatus for adaptive beamforming in smart antenna receiving system

The present invention relates to a tuning circuit, more specifically to a tuning circuit for continuous-time filter capable of making exact the Gm value to minimize the variation of the cutoff frequency due to the variation of process in the Gm-C type of continuous-time filter. According to the invention, a frequency tuning circuit is provided which comprises integrating means for generating a signal discharging from a first reference voltage to a first predetermined value and a signal charging from a second reference voltage to a second predetermined value; offset sampling means for sampling the offset voltages of the Gm cells by receiving a current multiplied by the offset voltages from the Gm cells included in the integrating means and providing a feedback path between the output nodes and the input nodes of the included Gm cells; comparative signal generating means for generating a comparative signal by generating a reference signal by dividing a clock inputted from the external, receiving the signal discharging from the first reference voltage to the first predetermined value and the signal charging from the second reference voltage to the second predetermined value from the integrating means, and comparing the actual intersection and the target intersection of these signals; and control means for generating a control signal to regulate the Gm values of the integrating means and the offset sampling means by receiving the reference signal and the comparative signal from the comparative signal generating means and detecting the phase differences therebetween.

Low offset automatic frequency tuning circuits for continuous-time filter

A nibble inversion and block inversion code coding and decoding method and a coding and decoding apparatus for the same. The apparatus includes a disparity calculator for receiving a pre-code in which a nibble-inverted indication (NII) bit is added at the position next to the LSB of a source data of a n-bit (n represents an odd number higher than 3), computing a disparity Dpc value of the pre-code, computing a disparity value Dni of the odd bit nibble-inverted pre-code, decoding a code type in accordance with the value of the register and the value of the running digital sum RDS which represent the disparity code and outputting a control signal for manipulating the bits of the pre-code; a RDS calculator for outputting a RDS value which is obtained by accumulatively summing the disparity of the calculated code word by the unit of blocks for selecting a code word or a complement code word when the computed disparity Dpc is not 0; and a bit manipulator for selecting a nibble-inverted and block-inverted (NIBI) code type in accordance with a control signal from the disparity calculator, manipulating a bit of the inputted pre-code and generating a code word or a complement code word, for thereby providing a transition and a DC spectrum component of 0, using a 1-bit redundancy bit when a predetermined n-bit (n represents odd number) is coded, providing multiple frame patterns, and fully providing an in-band and out-band signal.

Methods for coding and decoding nibble inversion codes and block inversion codes and coding and decoding apparatus for the same

A CMOS high frequency variable gain amplifier with maximum high frequency operation and wide variable gain characteristics that is formed from an amplifier having a plurality of variable gain amplifier cells connected in series for continuously enabling wide gain variation; and a control voltage generator for generating and outputting the control voltage of the variable gain amplifier cells. By using both the saturation region and the linear region of input differential transistors constituting the variable gain amplifier cells in order to obtain wide gain variation characteristics, it is possible for the variable gain amplifier to operate in the saturation region when the input signal is small to obtain a high gain and to operate in the linear region when the input signal is large to obtain minimum distortion and a low gain. Also, it is possible for the gain to have the characteristics in the form of an exponential function to the gain control voltage.

CMOS variable gain amplifier and control method therefor

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Daejeon, South Korea

Hee Bum Jung