Qualcomm Incorporated

Hector Ivan Oporta

Chunping Song

Christian Gregory Sporck

Thomas J O'Brien

Shashank Prakash Mane

Georgios Konstantinos Paparrizos

Guoyong Guo

Ta-Tung Yen

Bang Sup Lee

Yi Wang

Neal L Horovitz

Aaron Melgar

William Rader

Zhaohui Zhu

David Wong

Rashed Hoque

Daragh Padraic MacGabhann

Ahmed Abdelmoaty

Ji Hoon Hyun

Daryl Bergstrom

Thomas O'BRIEN

Power supply circuit having low quiescent current for a bypass mode. One example power supply circuit generally includes a transistor; a switching node coupled to a source of the transistor; a power supply rail; a capacitor having a first terminal coupled to the power supply rail and having a second terminal coupled to the switching node; a gate driver having an output coupled to a gate of the transistor, having a first power input coupled to the power supply rail, and having a second power input coupled to the switching node; logic having a first input coupled to the first terminal of the capacitor, having a second input coupled to the second terminal of the capacitor, and having a first output; and a pullup circuit having a control input coupled to a second output of the logic and having an output coupled to the gate of the transistor.

Power supply circuit with low quiescent current in bypass mode

Techniques and apparatus for controlling gate drivers of a switched-mode power supply (SMPS) circuit&#x2014;such as a three-level buck converter, a divide-by-two charge pump, or an adaptive combination power supply circuit capable of switching therebetween&#x2014;in a power-saving mode (e.g., a pulse-skipping mode). During such a power-saving mode in which a capacitor of a charge pump is disconnected from at least one power supply rail (e.g., first and second input nodes of the charge pump) and is coupled to power terminals of one or more drivers of the SMPS circuit, the capacitor is temporarily disconnected from the power terminals and temporarily coupled to the at least one power supply rail (e.g., for a few microseconds).

Gate driver power-saving method for switched-mode power supplies in pulse-skipping mode

Techniques and apparatus for supplying power to gate drivers of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a SMPS circuit having a first input voltage node and a second input voltage node, and a charge pump. The charge pump generally includes a first capacitive element having a first terminal and a second terminal; a first switch coupled between a first input node of the charge pump and the first terminal of the first capacitive element; a second switch coupled between the second terminal of the first capacitive element and a second input node of the charge pump; a third switch coupled between the first terminal of the first capacitive element and the first input voltage node of the SMPS circuit; and a fourth switch coupled between the second terminal of the first capacitive element and the second input voltage node of the SMPS circuit.

Constant gate-to-source-volt age-driving driver architecture for switched-mode power supplies

Certain aspects of the present disclosure generally relate to methods and apparatus for powering up a charge pump converter and providing protection and soft-start circuitry therefor. One example charge pump converter generally includes a first transistor and a second transistor coupled in series between an input voltage node and an output voltage node of the charge pump converter, a first capacitive element having a first terminal coupled to a node between the first and second transistors, and a first switch coupled to the input voltage node, the first switch being configured to selectively enable a first drive circuit having an output coupled to a control terminal of the second transistor.

Power-up sequencing and high voltage protection for charge pump converters

Over-voltage protection systems and methods are disclosed. In one aspect, a biasing circuit is added to a pre-existing clamp required by the Universal Serial Bus (USB) Type-C specification at a configuration control (CC) pin. The biasing circuit turns the pre-existing clamp into an adjustable clamp that dynamically adjusts to over-voltage conditions. In an exemplary aspect, the biasing circuit may include a biasing field effect transistor (FET) and a pair of switches that selectively couple the pre-existing clamp and the biasing FET to fixed voltages such that the CC pin is maintained at an acceptable voltage. In another exemplary aspect, the biasing circuit may omit the biasing FET and rely on two switches that selectively couple the pre-existing clamp to fixed voltages such that the CC pin is maintained at an acceptable voltage.

Over-voltage protection systems and methods

A configurable charge converter may include an adaptive low-dropout regulator. The adaptive low-dropout regulator may include a headroom detection circuit and a power supply controller. The headroom detection circuit may monitor a voltage drop across a field effect transistor (FET) and cause a programmable power supply to increase or decrease an output voltage accordingly. In some aspects, the configurable charge converter may include an adaptive low-dropout regulator and a buck/boost converter. The output power of the configurable charge controller may be provided by the adaptive low-dropout regulator, the buck/boost converter, or by both the adaptive low-dropout regulator and the buck/boost converter operating in combination.

Configurable charge controller

Systems, methods, and apparatus for testing devices adapted for connection to other devices using universal serial bus (USB) are disclosed. Devices to be tested are caused to enter a special mode of operation when resistance measured at one or more terminals of a USB Type-C connector have values associated with the special mode of operation. One or more operations of the device are automatically initiated when the resistance coupled to the at least one terminal of the connector has a measured value that matches one of a set of resistance values maintained by the device. The one or more operations may include configuring a power management circuit based on the measured value, and entering a mode of operation that controls startup of at least one processor on the device when the measured value matches a first resistance value.

Type-C factory and special operating mode support

Systems, methods, and apparatus for testing devices adapted for connection to other devices using universal serial bus (USB) are disclosed. Devices to be tested are caused to enter a special mode of operation when a resistance measured across across two terminals of a USB Type-C connector has a value associated with the special mode of operation. One or more operations of the device are automatically initiated when the resistance between the two terminals has a measured value that matches one of a set of resistance values maintained by the device. The one or more operations may include configuring a power management circuit based on the measured value, and entering a special or factory boot mode that controls startup of at least one processor on the device based on the measured value. Each of the set of resistance values exceeds a minimum open-circuit resistance value specified for the connector.

Growing community of inventors

San Jose, CA, United States of America

Hector Ivan Oporta