Skhynix Inc.

Hynix Semiconductor Inc.

Hea Jong Yang

Hee Youl Lee

Se Jun Kim

Jong Wook Kim

Min Kyu Jeong

Chan Mook Lim

Sung Jae Chung

Hyun Heo

Yong Dae Park

Gae Hun Lee

Yong Jun Kim

Jeong Hyong Yi

Yong Hwan Jang

Pyung Hwa Kim

Dong Jun Kim

Provided herein is a memory device that may include a string, a voltage generation circuit, a page buffer, and a channel initializing circuit. The string may include select transistors and memory cells coupled in series between a bit line and a source line. The page buffer may be configured to precharge or discharge the bit line. The voltage generation circuit may be configured to apply a turn-on voltage or a turn-off voltage to select lines coupled to the select transistors, apply at least one operating voltage to word lines coupled to the memory cells, or discharge the select lines or the word lines. The channel initializing circuit may be configured to control the voltage generation circuit and the page buffer so as to initialize a channel of the string when an operation performed on the memory cells is completed or is suspended before being completed.

Memory device and method of operating the same

A semiconductor device includes a memory string coupled between a common source line and a bit line, the memory string including at least one first selection transistor, a plurality of memory cells, and a plurality of second selection transistors. The semiconductor device also includes selection lines respectively coupled to the second selection transistors. The semiconductor device further includes a control logic circuit configured to float a first group of selection lines from among the selection lines at a first time and configured to float a second group of selection lines from among the selection lines at a second time different from the first time.

Semiconductor device and operating method of a semiconductor device

A method of operating a non-volatile memory device includes erasing a memory cell block, supplying a first drain turn-on voltage higher than a target level to the drain select line of the memory cell block, and performing a soft program operation by supplying a soft program voltage to the word lines of the memory cell block.

Method of operating non-volatile memory device

A method of erasing a semiconductor memory device comprises grouping a plurality of word lines of each memory block into at least two groups based on intensity of disturbance between neighboring word lines; performing an erase operation by applying a ground voltage to all word lines of a selected memory block and by applying an erase voltage to a well of the selected memory block; and first increasing the ground voltage of one group of the groups to a positive voltage during the erase operation.

Method of erasing semiconductor memory device

A method for erasing data of a NAND flash memory device including memory cell blocks may include using a first erase voltage applied to memory cells of a block to be erased. A first verification may be performed to verify erased states of the memory cells using a first verify voltage different than a second verify voltage. Memory cells that have not passed the first verification process are classified as a first group and a verification is performed on memory cells that have passed the first verification using the second verify voltage. Memory cells that have passed the second verification are classified as a second group and memory cells that have not passed the second verification are classified as a third group. Then data of the memory cells of the three groups are erased using first, second and third step voltages and first, second and third erase voltages, respectively.

Method for erasing data of NAND flash memory device

Growing community of inventors

Gyeonggi-do, South Korea

Hea Jong Yang