International Business Machines Corporation

Microsoft Technology Licensing, LLC

Arm Limited

Hazim Shafi

Ramakrishnan Rajamony

Balaram Sinharoy

Robert Brett Tremaine

Lixin Zhang

William Evan Speight

Orran Yaakov Krieger

Patrick Joseph Bohrer

Derek E Williams

Elmootazbellah Nabil Elnozahy

Khaled Salah Sedky

Xiaowei Shen

Alexander Dadiomov

Kenneth Lee Wright

Wael R El-Essawy

James Lyle Peterson

Dilma Menezes Da Silva

Xinhua Ji

Michael G Rosenfield

Matthew L Jacobs

William T Colburn

Ravi Kumar Arimilli

Michael John Williams

Peter H Hochschild

Ahmed Gheith

Michael Filippo

Francis Patrick O'Connell

Rico Mariani

Igor Ostrovsky

Edward George Essey

Huseyin Serkan Yildiz

Vikram Padmakar Bapat

Eric Ledoux

Mayank Agarwal

Brian Adelberg

Ryan A Nowak

James Rapp

Daniel Griffing

Ben Nesson

Drake A Campbell

Paulo Cesar Sales Janotti

Sivakumar Velusamy

Pooja Nagpal

Yuan Zhang

George Essex Englebeck

An analysis and visualization depicts how an application is leveraging computer processor cores in time. The analysis and visualization enables a developer to readily identify the degree of concurrency exploited by an application at runtime. Information regarding processes or threads running on the processor cores over time is received, analyzed, and presented to indicate portions of processor cores that are used by the application, idle, or used by other processes in the system. The analysis and visualization can help a developer understand contention for processor resources, confirm the degree of concurrency, or identify serial regions of execution that might provide opportunities for exploiting parallelism.

Analysis and visualization of application concurrency and processor resource utilization

A dynamic shared-memory data race detection tool with data-scoping capabilities to reduce runtime overheads is disclosed. The tool allows users to restrict analysis of memory locations to heap and/or stack variables that are of interest to them using explicit calls to functions provided in a library that is part of the race detection tool. The application code is instrumented to insert probes at all memory instructions and linked with the data race detection library to perform data-scoped race detection.

Data-scoped dynamic data race detection

An apparatus includes processing circuitry to process instructions, some of which may require addresses to be translated. The apparatus also includes address translation circuitry to translate addresses in response to instruction processed by the processing circuitry. Furthermore, the apparatus also includes translation latency measuring circuitry to measure a latency of at least part of an address translation process performed by the address translation circuitry in response to a given instruction.

Measuring address translation latency

The present invention extends to methods, systems, and computer program products for indicating parallel operations with user-visible events. Event markers can be used to indicate an abstracted outer layer of execution as well as expose internal specifics of parallel processing systems, including systems that provide data parallelism. Event markers can be used to show a variety of execution characteristics including higher-level markers to indicate the beginning and end of an execution program (e.g., a query). Inside the execution program (query) individual fork/join operations can be indicated with sub-levels of markers to expose their operations. Additional decisions made by an execution engine, such as, for example, when elements initially yield, when queries overlap or nest, when the query is cancelled, when the query bails to sequential operation, when premature merging or re-partitioning are needed can also be exposed.

Indicating parallel operations with user-visible events

Normalizing time across machines in a distributed system. A method includes obtaining one or more points defining differences in time between machines in the distributed system. Using the points, a determination of one or more time measurement drifts between machines is made. The one or more time measurement drifts indicate changing differences in time over time. One or more traces are collected. Each trace includes one or more events. Each event is correlated to a time stamp from one of the machines in the distributed system. Using the one or more determined time measurement drifts, the time stamps are normalized.

Time synchronization across computers in a distributed system

An analysis and visualization is used to depict how a concurrent application executes threads on processor cores over time. With the analysis and visualization, a developer can readily identify thread migrations and thread affinity bugs that can degrade performance of the concurrent application. An example receives information regarding processes or threads running during a selected period of time. The information is processed to determine which processor cores are executing which threads over the selected period of time. The information is analyzed and executing threads for each core are depicted as channel segments over time, and can be presented in a graphical display. The visualization can help a developer identify areas of code that can be modified to avoid thread migration or to reduce thread affinity bugs to improve processor performance of concurrent applications.

Analysis and visualization of concurrent thread execution on processor cores

A method of providing a visualization of states of a process includes identifying a set of potential states that can occur during the process and a corresponding set of colors, with each color in the set of colors corresponding to one of the potential states. A fixed ordering is established for the set of colors. A timeline graph including a plurality of colored vertical bars is displayed. Each colored vertical bar corresponds to a time interval of the process and includes at least one color selected from the set of colors based on at least one state occurring during the time interval corresponding to the vertical bar. The plurality of colored vertical bars includes a set of multiple-color vertical bars that each include a plurality of colors appearing in a vertical order based on the fixed ordering.

Visualization of states of a process

An analysis and visualization depicts how an application is leveraging processor cores of a distributed computing system, such as a computer cluster, in time. The analysis and visualization enables a developer to readily identify the degree of concurrency exploited by an application at runtime and the amount of overhead used by libraries or middleware. Information regarding processes or threads running on the nodes over time is received, analyzed, and presented to indicate portions of computer cluster that are used by the application, idle, other processes, and libraries in the system. The analysis and visualization can help a developer understand or confirm contention for or under-utilization of system resources for the application and libraries.

Analysis and visualization of cluster resource utilization

A data processing system includes a microprocessor having access to multiple levels of cache memories. The microprocessor executes a main thread compiled from a source code object. The system includes a processor for executing an assist thread also derived from the source code object. The assist thread includes memory reference instructions of the main thread and only those arithmetic instructions required to resolve the memory reference instructions. A scheduler configured to schedule the assist thread in conjunction with the corresponding execution thread is configured to execute the assist thread ahead of the execution thread by a determinable threshold such as the number of main processor cycles or the number of code instructions. The assist thread may execute in the main processor or in a dedicated assist processor that makes direct memory accesses to one of the lower level cache memory elements.

Assist thread for injecting cache memory in a microprocessor

A data processing system includes a system memory and a cache hierarchy that caches contents of the system memory. According to one method of data processing, a storage modifying operation having a cacheable target real memory address is received. A determination is made whether or not the storage modifying operation has an associated bypass indication. In response to determining that the storage modifying operation has an associated bypass indication, the cache hierarchy is bypassed, and an update indicated by the storage modifying operation is performed in the system memory. In response to determining that the storage modifying operation does not have an associated bypass indication, the update indicated by the storage modifying operation is performed in the cache hierarchy.

Data processing system and method for reducing cache pollution by write stream memory access patterns

Analyzing the performance of multi-threaded applications. An analysis and visualization of thread executions is performed on a graphical timeline using samples of thread execution. This allows users to understand when their application threads are executing, what they were executing, the degree of concurrency in thread execution, and the order in which work is performed in their application. The visualizations and analysis also allow users to sample thread execution contexts using a graphical user interface, as well as the generation of execution profile reports that may be filtered for a specific time range of execution and a subset of the threads running in the application.

Analysis and timeline visualization of thread activity

The use of marker(s) in the source code of a program under evaluation. A representation of the marker(s) remains in the binary version of the program under evaluation. During execution, upon executing the marker, data is gathered regarding the timeline of the execution of the marker in the context of overall timeline of execution. A visualization of the marker is then displayed that illustrates the execution of the marker in the context of a larger timeframe of execution. Optionally, the marker may be associated with text, or other data, at least some of which being rendered with the visualization. Accordingly, an application developer, or indeed anyone evaluating the program, may place markers within source code and/or evaluate the timeline of execution of those markers.

Marker correlation of application constructs with visualizations

Methods and systems are disclosed for measuring performance event rates at a computer and reporting the performance event rates using timelines. A particular method tracks, for a time period, the occurrences of a particular event at a computer. Event rates corresponding to different time segments within the time period are calculated, and the time segments are assigned colors based on their associated event rates. The event rates are used to display a colored timeline for the time period, including displaying a colored timeline portion for each time segment in its associated color.

Measurement and reporting of performance event rates

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Redmond, WA, United States of America

Hazim Shafi