Chaoyang Semiconductor Jiangyin Technology Co., Ltd.

Endura Technologies LLC

Other

Chaoyang Semiconductor (shanghai) Co., Ltd.

Hassan Ihs

Taner Dosluoglu

Jason Rau

Bertrand Diotte

A power delivery system may include a first voltage regulator configured to output an upper intermediate voltage about an expected discharge voltage plateau of a battery for use by the power delivery system, a switched capacitive charge pump configured to down convert the upper intermediate voltage of the first voltage regulator to a lower intermediate voltage, and a second voltage regulator configured to use the lower intermediate voltage to provide power to a load.

Three stage power delivery system

A digital microphone compresses a large voltage swing signal from a MEMS capacitor to a signal suitable for processing by integrated circuitry. The compression may be performed in an analog domain by selectively coupling adjustment capacitors in parallel to the MEMS capacitor. The digital microphone may decompress the signal in the digital domain using a decompression technique substantially an inverse of the compression performed in the analog domain.

Capacitive MEMS microphone with active compression

A digital microphone includes built-in self-test features. The features may include capability to apply different bias voltages to a MEMS capacitor sensor of the digital microphone, simulating application of different sound pressures to the digital microphone. The features may also include a digital oscillator, for applying a test signal to an analog front end of the microphone.

Capacitive MEMS microphone with built-in self-test

Droop monitors spread across a system-on-chip (SoC) monitor for voltage droops in regulated supply voltage supplied to logic circuitry of the SoC. In the event of a voltage droop, a clock signal supplied to the logic circuitry is stretched, to temporarily increase a period of the clock signal. The droop monitors may include a sensing delay line provided voltage at the regulated supply voltage, and a reference delay line supplied with a reference voltage, with operations of the delay lines monitored to determine a voltage droop.

SoC supply droop compensation

A DC-DC converter including digital circuitry for determining load current supplied to a load. In some embodiments the digital circuitry determines the load current differently based on whether the DC-DC converter is operating in pulse frequency modulation mode or pulse width modulation mode. In some embodiments the DC-DC converter includes circuitry for determining if a short circuit or over current condition exists.

Voltage regulator current load sensing

A deglitch circuit, or look-back, may be used to reduce or avoid reacting to a transient overvoltage situation by a voltage regulator. The voltage regulator may delay reacting to an overvoltage situation unless the overvoltage situation persists for more than a first programmable number of cycles.

Voltage regulator voltage overshoot look-back

A boost DC-DC converter operating in pulse frequency modulation (PFM) and pulse width modulation (PWM) modes includes a plurality of PWM signal generators. The PWM signal generators generate PWM signals with different duty cycles. PWM signals with larger duty cycles may be selected for use in undervoltage situations.

Boost DC-DC converter having digital control and reference PWM generators

A DC-DC converter operating in pulse frequency modulation (PFM) and pulse width modulation (PWM) modes includes a plurality of PWM signal generators. The PWM signal generators generate PWM signals with different duty cycles. PWM signals with larger duty cycles may be selected for use in undervoltage situations.

DC-DC converter having digital control and reference PWM generators

A system for performing dynamic frequency scaling may include a voltage regulator and a decision block. The decision block may be configured to determine a target frequency of operations for a system on chip.

Dynamic frequency scaling based on supply current monitoring

A regulated DC-DC switching converter includes a bypass mode in which ends of an output inductor are coupled together. Circuitry determines output capacitor current and load current components of output inductor current during operation of the switching converter, for use in controlling switching operations.

DC-DC converter with digital current sensing

A fast latched comparator may include an amplifier portion and a latch portion. A switch activated by a reset pulse may short together outputs of the latched comparator.

Fast pre-amp latch comparator

The disclosure relates to a method of generating an output voltage from a high input voltage and a command signal, the method comprising: providing an inductor having a first terminal and a second terminal linked to a low voltage by a capacitor, the second inductor terminal supplying the output voltage to a load, the low voltage being lower than the high input voltage; and connecting the first inductor terminal either to the high input voltage or to the inductor second terminal, as a function of the command signal.

Switched power stage with inductor bypass and a method for controlling same

A switching power regulator provides for power regulation for a load, based at least in part on comparison of an output voltage with a reference voltage. The reference voltage may be changed, and in some cases changed dynamically, while regulated power is provided to the load. The switching power regulator may include a bypass switch for coupling ends of an output inductor.

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San Diego, CA, United States of America

Hassan Ihs