Analog Devices,inc.

Harvey J Ray

Franklin Marshall Murden, Ii

Michael Ray Elliott

Carl W Moreland

Marvin J Young

A clock-to-clock auto-ranging ADC operates directly on an analog signal in the IF band or higher to track its gain range on a clock-to-clock basis and produce a digital signal that maintains high resolution of the analog signal without clipping or loss of signal sensitivity. This is accomplished by sampling an analog signal of sufficiently high frequency that a peak detector can accurately determine the maximum signal level over at least one-half a signal period and then reset the signal gain going into the ADC prior to the beginning of the next sampling period. This insures that the analog signal will always be within the range of the ADC. In accordance with the well known principles of sampling theory, the sampled analog signal is aliased into the frequency region between DC and one half the sampling frequency.

Intermediate frequency (IF) sampling clock-to-clock auto-ranging

A high speed wide bandwidth peak detector uses multiple peak detection stages that detect different sub-ranges of a full-scale analog signal range. Splitting the peak detector into multiple stages reduces the number of taps in each stage, and hence their capacitance, which increases their bandwidth. The number of taps can be further reduced by using a non-uniform resolution of the desired full-scale amplitude range. In the preferred embodiment, identical peak detection stages are separated by fixed gain stages that map the different sub-ranges to respective detection stages. This approach minimizes the effects of offset errors in the individual stages but requires gain stages that have wider bandwidths than the detection stages and which can be closely matched to maintain amplitude resolution.

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Winston Salem, NC, United States of America

Harvey J Ray