International Business Machines Corporation

Harvey Charles Hamel

David Clifford Long

Robert Anthony Rita

Mukta S Farooq

Herbert I Stoller

John Ulrich Knickerbocker

Mukta G Farooq

Benjamin V Fasano

Sudipta Kumar Ray

Frank Louis Pompeo

Harsaran S Bhatia

Jason Lee Frankel

Edward R Pillai

Suresh D Kadakia

Christopher D Setzer

Benjamin Paul Tongue

Mario John Interrante

Shaji Farooq

Chirag Suryakant Patel

Samuel McKnight

Michael A Gaynes

Roy Rongqing Yu

Jeffrey Allen Zitz

Charles Hampton Perry

David James Alcoe

Lewis Sigmund Goldmann

Chandrika Prasad

Randall Joseph Stutzman

William Edward Sablinski

Yuet-Ying Yu

Michael J Domitrovits

Brenda Lee Peterson

Karl J Puttlitz, Sr

Michael Berger

Renee L Weisman

Jeffrey Thomas Coffin

John R Pennacchia

Michael S Cranmer

Thomas P Moyer

Charles Timothy Ryan

Megan J Shannon

Marlene W Moyer

Christopher Todd Spring

Kenneth D Terlep

A silicon carrier space transformer assembly includes one or more silicon structures, which provide space transformer scaling to permit interconnection for fine pitch input/output interconnections with a semiconductor die or wafer, and fine pitch test probe tips connected to the one or more silicon structures.

Silicon carrier space transformer and temporary chip attach burn-in vehicle for high density connections

A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier; one or more integrated circuit chips attached to a top surface of the chip carrier; a ceramic-based cap structure attached to the top surface of the chip carrier, and covering the one or more integrated circuit chips; and a conductive grid structure embedded within the chip carrier and the cap structure, the conductive grid structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction; wherein the conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

Structure for implementing secure multichip modules for encryption applications

A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a cap structure attached to the chip carrier, covering the one or more integrated circuit chips. A conductive grid structure is formed in the chip carrier and cap structure, the conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction. The conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

Method and structure for implementing secure multichip modules for encryption applications

A method and electrical structure for separating electronic components from one another joined by solder interconnections. An electronic module is joined to a substrate via a solder interconnection, whereby the electronic module has an electrical heating component residing within a bottom layer thereof adjacent a solder interconnection. Preferably, a chip carrier is joined to a board whereby the chip carrier has an electrical mesh plane for heating adjacent the solder interconnection. Resistive heat is generated within this electrical heating component either by applying an electrical current to the electrical heating component, or by non-contact inductively heating the layer in which such electrical heating component resides to generate resistive heat within the electrical heating component. The resistive heat is transferred to the solder interconnection to allow for localized melting of the solder interconnection and removal of the electronic components from one another.

Method for separating electronic component from organic board

An integrated circuit structure and a method of manufacturing, wherein the method comprises forming a first via in an interconnect layer of the substrate, wherein the first via comprises a first size diameter; and forming a second via in the interconnect layer, wherein the second via comprises a second size diameter, the second size diameter being dimensioned larger than the first size diameter, wherein the second via comprises a non-uniform circumference, and wherein the substrate is configured in an approximately 1:1 ratio (i.e., approximately equal number) of the first and second vias. The first and second vias are laser formed or are formed by any of mechanical punching and photolithography. The second via is formed by sequentially forming multiple partially overlapping vias dimensioned and configured with the first size diameter. The first and second vias are arranged in a grid to allow for wiring of electronic devices.

Method and structure to wire electronic devices

A dielectric substrate having an embedded inductor wherein each turn of the inductor traverses several layers such that the top and bottom of each turn of the inductor are parallel to each other but are in different layers and the sides of each turn of the inductor traverse at least one layer to connect the top and bottom of the inductor.

Embedded inductor and method of making

Method of forming a dielectric substrate having a multiturn inductor

MLC (multilayer ceramic) frequency selective circuit structures are disclosed. The MLC frequency selective circuit structures have a solenoid and toroid coil geometry in a multilayer electronic package which functions as a frequency selective tuned circuit in which both the number of turns and the aspect ratio of the solenoid coil are selected to adjust the tuned frequency. In some embodiments, a plurality of such coils can be connected together to provide a selected bandwidth about a tuned center frequency.

MLC frequency selective circuit structures

Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.

EMI shielding for semiconductor chip carriers

A multi-layer ceramic capacitor and method of manufacturing the capacitor, the capacitor having signal vias surrounded by an area containing a material having a low dielectric constant, the via and surrounding area of low dielectric constant material inserted in a material having a high dielectric constant.

High k dielectric material with low k dielectric sheathed signal vias

A buckling beam probe assembly and a process to make the assembly using insulated metal to hold the vertical beam probe wires. The buckling beam probe assembly electrically connects a test apparatus with contact pads on the surface of a device to be tested. The assembly is formed with a plurality of buckling beam wires each having a head, a body, and a tail. Each of the beam wires is pressed vertically onto the contact pads and buckles laterally to adapt to height differences of the contact pads caused by irregularities on the surface of the device to be tested. A top plate has a first plurality of apertures receiving the heads of the plurality of buckling beam wires. A bottom plate has a second plurality of apertures receiving the tails of the plurality of buckling beams wires. A plurality of intermediate metal sections are positioned between the top plate and the bottom plate. Each of the intermediate metal sections is formed with a plurality of thin metal layers and has a plurality of openings coated with an insulation layer. The bodies of the plurality of buckling beam wires pass through the openings.

Metal buckling beam probe

An electrical connector arrangement for connecting electronic devices to one another. The connector arrangement uses tensile members and compression members, at least the tensile members of which act to provide both an electrical connection between electronic devices and force over a range of distances to hold the devices together. The tensile members provides tensile force acting to hold the electronic devices together while the compression members provide an opposing compressive force over a range of distances which balances the tensile force to thereby form a cellforce connector used to connect an array of electrical contact points on one electronic device to a corresponding array of electrical contact points on another electronic device.

Mechanical attachment means used as electrical connection

An electronic component structure is proposed, wherein an interposer thin film capacitor structure is employed between an active electronic component and a multilayer circuit card. A method for making the interposer thin film capacitor is also proposed. In order to eliminate fatal electrical shorts in the overlying thin film regions that arise from pits, voids, or undulations on the substrate surface, a thick first metal layer, on the order of 0.5-10 mm thick, is deposited on the substrate upon which the remaining thin films, including a dielectric film and second metal layer, are then applied. The first metal layer is comprised of Pt or other electrode metal, or a combination of Pt, Cr, and Cu metals, and a diffusion barrier layer. Additional Ti layers may be employed for adhesion enhancement. The thickness of the first metal layers are approximately: 200 A for the Cr layer; 0.5-10 mm for the Cu layer; 1000 A-5000 A for the diffusion barrier; and 100 A-2500 A for a Pt layer.

Method for a thin film multilayer capacitor

Growing community of inventors

Poughkeepsie, NY, United States of America

Harvey Charles Hamel