Sharp Kabushiki Kaisha Corporation

Haruya Mori

Hiroyuki Nakanishi

Hideki Shioe

Tetsuya Akamatsu

A semiconductor integrated circuit, including: a logic section; an initiating current generating section for generating initiating current for initiating or re-initiating a circuit when the circuit is to be initiated or the circuit operates abnormally; an initiating current detecting section for detecting the initiating current of the initiating current generating section and outputting a detection signal indicating whether or not the initiating current generating section operates normally; and a signal selection section for selecting one of the detection signal and an output from the logic section based on an internal signal of the logic section which is controllable from outside of the logic section, and outputting the selected one to a terminal.

Semiconductor integrated circuit, test method and electronic information device

In the peripheral part of a semiconductor chip, third electrode pads for wire bonding and plate wiring and first electrode pads dedicated to wire bonding are provided. On the other hand, second electrode pads dedicated to plate wiring are provided on an inner part away from the edge of the semiconductor chip. Further, the first and second electrode pads are connected via metal bypass layers, respectively. In the case of wire bonding, the first and third electrode pads are used and the third electrode pads are encapsulated with an insulating layer. Further, in the case of plate wiring, the second and third electrode pads are used and the first electrode pads are covered with an insulating layer. This realizes a semiconductor chip which has great versatility and which can be used in semiconductor packages of various types.

Semiconductor chip and semiconductor device

A semiconductor integrated circuit has an output end, an N-channel MOS transistor having the drain thereof connected to the output end, and a P-channel MOS transistor having the drain thereof connected to the output end. The semiconductor integrated circuit further has an operational amplifier having the non-inverting input terminal thereof connected to the output end, receiving a voltage at the inverting input terminal thereof, and having the output terminal thereof connected to the gate of the P-channel MOS transistor. In coordination with the P-channel MOS transistor, the operational amplifier operates so as to keep the voltage at the output end equal to the voltage fed thereto.

Reference voltage generating circuit

An electric current switch circuit in accordance with the present invention is arranged so that an output of an IIL logic circuit is connected with the base of the first transistor of NPN type that switches ON or OFF the electric current. The first constant current source and the second transistor cause the first transistor to switch ON during a period when the output of the IIL logic circuit is in an OFF state, to switch OFF during a period when the output of the IIL logic circuit is in an ON state. Thus, only a voltage of 0.9V to 1.1V (the sum of a drop voltage across the first resistor and the base-emitter voltage) is applied to the base of the first transistor. Accordingly, a voltage less than the withstand voltage of the IIL logic circuit is applied to the base of the first transistor. This allows the electric current switch to be realized by three transistors and one resistor when the first current source is an NPN transistor and, therefore, in an electric current switch that switches ON or OFF the electric current in response to the output of the IIL logic circuit, it is possible to reduce the circuit scale and the power consumption and to lower the lower limit of the output voltage.

Electric current switch circuit and D/A converter using same

There is a voltage dividing circuit having a voltage dividing resistor for generating reference voltages for A/D conversion. The voltage dividing resistor further comprises a semiconductor element and, provided thereon, a resistance element, at least one capacity electrode and dielectric held therebetween. Each capacity electrode thereon is earthed. The voltage dividing resistor and the voltage dividing circuit are capable of lowering impedance of output terminals in a high frequency range, while avoiding an increase of a surface area of a chip, and undulation of impedances of output terminals in a high frequency range.

Voltage dividing resistor and voltage dividing circuit

An oscillation output generating circuit outputs a voltage V0 as an oscillation output, and a first comparing circuit compares V0 with a constant voltage V1, while a second comparing circuit compares V0 with a constant voltage V2 (&lt;V1). In response to outputs from the first and second comparing circuits, a state maintaining circuit controls the raising/dropping of V0 through the oscillation output generating circuit. When a synchronizing pulse for synchronous oscillation is not inputted, self-advancing oscillation is started, and synchronous oscillation is started otherwise. When the synchronizing pulse is in an active state, a nullifying circuit inhibits transmission of an output from one of the first and second comparing circuits to the state maintaining circuit, whereas the nullifying circuit allows the above transmission when the synchronizing pulse is in an inactive state. Further, when the synchronizing pulse has shifted from the active state to the inactive state, an edge trigger circuit switches an output signal from the state maintaining circuit between a dropping signal and a rising signal.

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Tenri, Japan

Haruya Mori