Renesas Technology Corp.

Renesas Electronics Corporation

Toppan Printing Co., Ltd.

Reneasa Technology Corp.

Haruo Furuta

Shuichi Ueno

Ryoji Matsuda

Takeharu Kuroiwa

Yoshinori Okumura

Takashi Takenaga

Tatsuya Fukumura

Yiming Huai

Shin Hasegawa

Tomohiro Yamashita

Hiroshi Kato

Eugene Youjun Chen

Natsuo Ajika

Lien-Chang Wang

Shigehiro Kuge

Yasuyoshi Itoh

Hiroyuki Chibahara

Shuuichi Ueno

Masaki Nojima

Toshiji Fujita

Chihiko Yamada

Hiroshi Oshita

Shinya Hirano

Disclosed is a method for manufacturing a magnetic storage device comprising a TMR element, which comprises a step for forming an insulting film on an interlayer insulating film provided with a wiring layer, an opening formation step for forming an opening in the insulating film so that the wiring layer is exposed therefrom, a metal layer formation step for forming a metal layer on the insulating layer so that the opening is filled therewith, a CMP step for polishing and removing the metal layer on the insulating layer by a CMP method and forming the metal layer remaining in the opening into a lower electrode, and a step for forming a TMR element on the lower electrode. Also disclosed is a magnetic storage device comprising an interlayer insulating film provided with a wiring layer, an insulating film formed on the interlayer insulating film, an opening formed in the insulating film so that the wiring layer is exposed therefrom, a barrier metal layer provided so as to cover the inner surface of the opening, a lower electrode formed on the barrier metal so as to fill the opening, and a TMR element formed on the lower electrode.

Method for manufacturing magnetic storage device and magnetic storage device

A semiconductor device having a MTJ device excellent in operating characteristics and a manufacturing method therefor are provided. The MTJ device is formed of a laminated structure which is obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower and upper magnetic films contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlO) as a constituent material. A CAP layer is formed over the upper magnetic film and a hard mask is formed over the CAP layer. The CAP layer contains a substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a substance of crystalline tantalum (Ta) as a constituent material. The film thickness of the hard mask is larger than that of the CAP layer.

Semiconductor device including a magnetic tunnel junction device including a laminated structure and manufacturing method therefor

The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiOis formed.

Semiconductor device and method of manufacturing the same

A method for manufacturing a magnetic memory device which includes a TMR element, and the method includes: a step of forming a lower wiring layer; a step of forming an interlayer insulating layer on the lower wiring layer; a step of forming an opening in the interlayer insulating layer so that the lower wiring layer is exposed; a step of forming a barrier metal layer so that the interlayer insulating layer and an inner surface of the opening are covered; a step of forming a metal layer on the barrier metal layer so that the opening is embedded; a polishing step of removing the metal layer on the barrier metal layer through polishing using the barrier metal layer as a stopper so that a wiring layer that includes a metal layer being embedded in the opening and the barrier metal layer is formed; and an element fabricating step of fabricating a TMR element on the wiring layer.

Method for manufacturing a magnetic memory device and magnetic memory device

Semiconductor tunneling magneto resistance device and method of manufacturing the same

A width and a thickness of a bit line are represented as Wand T, respectively, a thickness of a digit line is represented as T, and a distance from a center of the digit line in a thickness direction to a center of a free layer of an MTJ element in the thickness direction is represented as L. A width of the digit line is represented as W, and a distance from a center of the bit line in the thickness direction to the center of the free layer of the MTJ element in the thickness direction is represented as L. The distances Land Land the cross-sectional areas Sand Sare set in such a manner that when L/L1, a relation of (&#x2153;)&#xb7;(L/L)&#x2266;S/S&#x2266;1 is satisfied and when L/L&#x2266;1, a relation of 1&#x2266;S/S&#x2266;3(L/L) is satisfied.

Magnetic memory device

A width and a thickness of a bit line are represented as W1 and T1, respectively, a thickness of a digit line is represented as T2, and a distance from a center of the digit line in a thickness direction to a center of a free layer of an MTJ element in the thickness direction is represented as L1. A width of the digit line is represented as W2, and a distance from a center of the bit line in the thickness direction to the center of the free layer of the MTJ element in the thickness direction is represented as L2. The distances L1 and L2 and the cross-sectional areas S1 and S2 are set in such a manner that when L1/L2&#x2267;1, a relation of (&#x2153;)&#xb7;(L1/L2 )&#x2266;S2/S1&#x2266;1 is satisfied and when L1/L2&#x2266;1, a relation of 1&#x2266;S2/S1&#x2266;3(L1 /L2) is satisfied.

A width and a thickness of a bit line are represented as Wand T, respectively, a thickness of a digit line is represented as T, and a distance from a center of the digit line in a thickness direction to a center of a free layer of an MTJ element in the thickness direction is represented as L. A width of the digit line is represented as W, and a distance from a center of the bit line in the thickness direction to the center of the free layer of the MTJ element in the thickness direction is represented as L. The distances Land Land the cross-sectional areas Sand Sare set in such a manner that when L/L&#x2267;1, a relation of (&#x2153;)&#xb7;(L/L)&#x2266;S/S&#x2266;1 is satisfied and when L/L&#x2266;1, a relation of 1&#x2266;S/S&#x2266;3(L/L) is satisfied.

A semiconductor device and a manufacturing method therefor reduce the occurrence of variation in threshold voltage of a MOS transistor formed by a dual oxide process, thereby to improve manufacturing yield. On the main surface of a semiconductor substrate (), gate oxide films (GX, GX) of different thickness are located in active regions (A,B), respectively, and gate electrodes (GT, GT) are located on top of the gate oxide films (GX, GX), respectively. An isolation insulating film () which defines the active region (A) in a thick-film portion (AR) has an excessively removed edge portion on the side of a MOS transistor () and thereby a recessed portion (DP) is formed in the edge portion of the active region (A). On the other hand, an edge portion of the isolation insulating film () in a thin-film portion (BR) on the side of a MOS transistor () is not excessively removed.

Semiconductor device having recessed isolation insulation film

A semiconductor device is provided which includes a diode formed of a MISFET and having a current-voltage characteristic close to that of an ideal diode. Negatively charged particles (e.g. electrons:) are trapped on the drain region () side of a silicon nitride film () sandwiched between films of silicon oxide (). When a bias voltage is applied between the drain and source with the negatively charged particles () thus trapped and in-channel charged particles () induced by them, the MISFET exhibits different threshold values for channel formation depending on whether it is a forward bias or a reverse bias. That is to say, when a reverse bias is applied, the channel forms insufficiently and the source-drain current is less likely to flow, while the channel forms sufficiently and a large source-drain current flows when a forward bias is applied. This offers a current-voltage characteristic close to that of the ideal diode.

Semiconductor device

A semiconductor device capable of holding multibit information in one memory cell, and a method of manufacturing the semiconductor device. A trench is formed in a channel portion of an MONOS transistor. Then, a source side portion and a drain side portion in a silicon nitride film of a gate insulating film which interpose the trench are caused to function as first and second electric charge holding portions capable of holding electric charges. In the case in which first electric charges are trapped on the drain side and second electric charges are trapped on the source side, a portion of a gate electrode in the trench functions as a shield. If a fixed potential is given to the gate electrode, the second electric charge holding portion is not influenced by an electric field induced by the first electric charges so that the trapping of the second electric charges is not inhibited.

Semiconductor device with a metal insulator semiconductor transistor

A semiconductor device and a manufacturing method thereof which is suited for forming both a transistor for a memory cell and a transistor for a high voltage circuit part on one semiconductor substrate, and moreover, has little deterioration of an electric characteristic in the structure that a sidewall insulating film in a shared contact plug part is removed is provided. An active layer is formed by performing an additional impurity injection on a part where a sidewall insulating film is removed in a forming portion of a shared contact plug. An insulating film is laminated in a high voltage circuit part and a sidewall insulating film of wide width is formed. According to this, a forming width of a sidewall insulating film can be made small in a MOS transistor for a memory cell part, and a forming width of a sidewall insulating film can be made large in a MOS transistor for a high voltage circuit part. Thereupon, in the high voltage circuit part, a source/drain active layer can be formed in the position more distant from a gate electrode.

Semiconductor device and manufacturing method thereof

A color television video signal is directly read out in synchronism to the scanning speed of a scanner, the video signal thus read out is converted into three primary color signals, and these three primary color signals are in turn converted into process video signals, which are supplied to the scanner. A printing plate can be produced directly from a television video signal without requiring any color picture original.

Growing community of inventors

Tokyo, Japan

Haruo Furuta