Hamamatsu-photonics K.k.

Harumichi Mori

Kazuki Fujita

Ryuji Kyushima

Masahiko Honda

Junichi Sawada

Haruyoshi Okada

Seiichiro Mizuno

Hiroo Yamamoto

Minoru Ichikawa

Mitsuhito Mase

Takuya Homme

Toshio Takabayashi

Takaharu Suzuki

Masahiro Suganuma

Provided is a photosensor including a light receiving part generating electric charge according to incident light, a charge transfer gate configured to transfer the electric charge generated in the light receiving part, and a signal generation unit configured to generate a charge transfer signal applied to the charge transfer gate, in which the signal generation unit generates the charge transfer signal so that the charge transfer gate is brought into a charge transfer state in a first time range of a first period belonging to an n-th (n is an integer of 1 or more) frame and the charge transfer gate is brought into a charge transfer state in a second time range of a second period belonging to an m-th (m is an integer of 1 or more different from n) frame.

Photosensor, and driving method for photosensor

The present embodiment relates to a radiation imaging system and the like provided with a solid-state imaging device having a structure enabling reduction of linear noise appearing in an integrated image. The solid-state imaging device comprises: L pieces of imaging pixel region arranged along a direction crossing a moving direction of a relative position of the solid-state imaging device; and L pieces of A/D converter provided corresponding to the L pieces of imaging pixel region. Each imaging pixel region includes pixels arranged two-dimensionally to form an M-row by N-column matrix. Any one of the L pieces of A/D converter executes a dummy A/D conversion once or more times after an A/D conversion of an electric signal from a pixel of an m-th row, before an A/D conversion of an electric signal from a pixel of an (m+1)-th row.

Solid-state image capturing device, radiation image capturing system, and method of controlling solid-state image capturing device

A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.

Solid-state imaging device

A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.

Solid state imaging apparatus including photodetecting section

A solid-state imaging device includes a photodetecting unit including MN pixels arrayed two-dimensionally in M rows and N columns, an output unit outputting a digital value generated on the basis of the amount of charge input from the pixels, and a control unit. The control unit divides the MN pixels in the photodetecting unit into unit regions each including pixels in Q rows and R columns, divides the unit regions arrayed two-dimensionally in (M/Q) rows and (N/R) columns into binning regions each including unit regions in K rows and one column, and repeatedly outputs the digital value according to the sum of amounts of the charges output from KQR pixels included in each binning region from the output unit K times in a column order for each row sequentially for the binning regions arrayed two-dimensionally in (M/KQ) rows and (N/R) columns.

Solid-state imaging device, X-ray imaging system, and solid-state imaging device driving method

An adding unit adds an input signal generated in a signal generating unit connected to a specific pixel electrode portion out of pixel electrode portions arranged around a certain pixel electrode portion to an input signal generated in a signal generating unit connected to the certain pixel electrode portion. A discriminating unit discriminates whether a carrier input pattern coincides with any one of a plurality of discrimination patterns, and the carrier input pattern indicates, per the pixel electrode portion, presence of any carrier received in the certain pixel electrode portion and the pixel electrode portions arranged around the certain pixel electrode portion. The counting unit increments the number of photons in the case where the discriminating unit discriminates that the carrier input pattern coincides with any one of the discrimination patterns and further the input signal output from the adding unit after addition has a value exceeding a predetermined threshold.

Two-dimensional photon counting element

Solid state imaging device including photodetecting section

A radiation image sensor includes a charge generation section and, a circuit board accumulating and transferring charge generated in the charge generation section. The circuit board includes a semiconductor substrate, a capacitive section accumulating the charge generated in the charge generation section, and a MOS transistor in the semiconductor substrate. The MOS transistor includes one end connected to the capacitive section and another end connected to a wire transferring the charge. The capacitive section includes a partial region of the semiconductor substrate, a conductor layer disposed on the partial region and electrically connected to the charge generation section, and an insulating layer interposed between the partial region and the conductor layer.

Radiation image sensor

A solid-state imaging device includes a sensor panel section and a readout circuit section. The sensor panel section is disposed on a glass substrate and has a photodetecting section including pixels arrayed in M rows and N columns, row selection lines, and readout lines. The readout circuit section is disposed on a substrate and has N integration circuits. Rectifier circuits are connected between nodes, between N panel-side connection points and the integration circuits, and a constant potential line. Circuit elements having resistance components are connected between the nodes and readout lines.

A sensor unit includes a metallic base member, a solid-state imaging element, and amplifier chips. The base member has a first placement surface and a second placement surface. The solid-state imaging element has a photodetecting surface, and is disposed on the first placement surface such that a rear surface and the first placement surface face each other. The amplifier chips are mounted on a substrate disposed on the second placement surface. The base member further has side wall portions facing side surfaces of the solid-state imaging element. The chips and the solid-state imaging element are electrically connected to one another via a bonding wire. The chips are thermally coupled to the base member via a thermal via of the substrate.

Sensor unit and solid-state imaging device

A vertical shift register section includes M logic circuits for outputting row selection control signals respectively to M row selection wiring lines and shift register circuits disposed for every two row selection wiring lines. The M logic circuits, when a binning control signal Vbinor Vbinand an output signal of the shift register circuit both have significant values, output a row selection control signal Vsel so as to close a readout switch. The vertical shift register section, by controlling the timing at which the binning control signals Vbinand Vbintake significant values, realizes a normal operation mode for successively selecting the two row selection wiring lines and a binning operation mode for simultaneously selecting the two row selection wiring lines. Accordingly, a vertical binning operation is realized by a small vertical shift register.

A controlling section causes a charge of a photodiode to be output to an integration circuit by bringing a readout switch into a connected state, and then brings the readout switch into a non-connected state. Thereafter, a voltage value is output to a holding circuit from the integration circuit. After carrying out the output operation mentioned above, an operation for causing a charge held in an integrating capacitive element to be discharged, and bringing the readout switch into a connected state to cause a charge held in the photodiode to be discharged and an operation for causing voltage values held in the holding circuits to be sequentially output are carried out in parallel. Accordingly, a solid-state imaging device and a method of driving it capable of solving the problems due to a memory effect, a delay effect, and switching noise are realized.

Solid-state imaging device including signal connecting section and solid-state imaging device driving method

Charges accumulated in pixels contained in one or a plurality of readout object rows that form a partial region of a photodetecting region are selectively read out in each of the L times (L is an integer not less than 2) of imaging frames, and in each of the L times of imaging frames, resetting of charges accumulated in pixels contained in only a part of non-readout object rows is performed, as well as, resetting is performed at least once in a period of the L times of imaging frames for each of the two or more non-readout object rows. Accordingly, a control method for a solid-state imaging element capable of reducing the time required per one imaging frame and reducing load on the peripheral circuit when selectively reading out charges accumulated in pixels in a partial region of the photodetecting region is realized.

Method for controlling solid-state image pickup device

A controlling section, by bringing readout switches of pixels of a certain row out of the M rows into a connected state, causes charges generated in the row to be input to integration circuits, causes first holding circuits to hold voltage values output from the integration circuits, and then brings transfer switches into a connected state to transfer the voltage values to the second holding circuits, and thereafter performs in parallel an operation for causing the voltage values to be sequentially output from the second holding circuits and an operation for, by bringing readout switches of pixels of another row into a connected state, causing charges generated in the row to be input to the integration circuits. Accordingly, a solid-state imaging device and a driving method thereof capable of suppressing variations in output characteristics, while solving the problem due to a delay effect are realized.

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Hamamatsu, Japan

Harumichi Mori