Kabushiki Kaisha Toshiba

Haruki Arai

Akio Nakagawa

Ichiro Omura

Yusuke Kawaguchi

Tatsuya Yamada

Kazuo Shimokawa

Kenichi Matsushita

Noriaki Yoshikawa

Yasuhito Saito

Yoshiki Endo

Osamu Usuda

Hiroshi Takei

Takashi Koyanagawa

Morio Takahashi

Masahiro Urase

Taiki Miura

Tomohiro Kawano

Masako Ooishi

Yoshihiro Yamaguchi

Nobuyuki Sato

Hitoshi Takahashi

Koichi Endo

Kumiko Masuda

Fumito Suzuki

A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Semiconductor module

A semiconductor substrate is of first-conductivity-type and has a principal surface. A first semiconductor region and a second semiconductor region are of second-conductivity-type and formed apart from each other in the principal surface of the semiconductor substrate. A third semiconductor region is of second-conductivity-type and formed on the first semiconductor region. The third semiconductor region has an impurity concentration higher than that of the first semiconductor region. A fourth semiconductor region is of first-conductivity-type and formed on the third semiconductor region. A first main electrode is formed on the fourth semiconductor region. A second main electrode is formed on the second semiconductor region. A gate electrode is formed, at least on the first semiconductor region and on the principal surface of the semiconductor substrate between the fourth semiconductor region and the second semiconductor region, with a gate insulating film therebetween.

Semiconductor device having insulated gate bipolar transistor with dielectric isolation structure

In an IC driver using SOI dielectric isolation structure having a lower and an upper arm side drivers, the upper arm side driver operates in a floating state, a carrier injector region is disposed in an semiconductor island where a switching device for the upper-side circuit is formed. The IC driver drives a set of an upper-side and a lower-side output power devices, a first main electrode of the upper-side output power device is connected to a high level power supply, a second main electrode of the upper-side output power device is connected to a first main electrode of the lower-side output power device, a second main electrode of the lower-side output power device is connected to ground potential (GND). The carrier injector region is formed deeper than a couple of main electrode regions of the switching device in the upper arm side driver. Moreover, this injector region is connected to an intermediate potential at connecting terminal of the upper-side and the lower-side output power devices. A current for compensating the displacement current J,flowing in the parasitic condenser C,inherent to the SOI structure is supplied through the carrier injector from this intermediate potential terminal, to diminish the extra load of the internal power supply circuit for supplying the upper arm side driver with a predetermined voltage.

Dielectrically isolated IC driver having upper-side and lower-side arm drivers and power IC having the same

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Yokohama, Japan

Haruki Arai