Infineon Technologies Ag

Harry Walter Sax

Wolfgang Lehnert

Johann Gatterbauer

Evelyn Napetschnig

Michael Rogalli

Edmund Riedl

Norbert Mais

Fabian Craes

Maik Lohmann

Verena Muhr

A method of manufacturing a semiconductor package is provided. The method may include singulating a wafer including a plurality of dies fixed to an auxiliary carrier to generate dies having released side surfaces, covering at least the side surfaces of the dies with a passivation layer using a deposition process at a temperature below the melting temperature of the auxiliary carrier, keeping a gap between the passivation layers at the side surfaces of adjacent dies of the plurality of dies.

Method of manufacturing a semiconductor package, die, and die package

A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.

Chip package and method of forming a chip package

A method of forming a layer structure is provided. The method may include plasma-treating a metal surface with a hydrogen-containing plasma, thereby forming nucleophilic groups over the metal surface, and forming an organic layer over the metal surface, wherein the organic layer comprises silane and is covalently bonded to the nucleophilic groups.

Method of forming a layer structure, layer structure, method of forming a contact structure, method of forming a chip package, and chip package

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Straubing, Germany

Harry Walter Sax