Menara Networks, Inc.

Other

The Aerospace Corporation

IP Video Communications Corporation

Harry Tan

Salam Elahmadi

Robert M Liang

Lloyd Frederick Linder

Shu Lin

Matthias Bussmann

Kelvin Tran

Joseph U Han

Christopher A Gill

Devin K Ng

Jomo K Edwards

Matthias Bussman

The Universal Packet Loss Recovery System (UPLRS) is capable of recovering end-to-end network packet losses to obtain reliable end-to-end network delivery of multimedia streaming content over IP networks where packet losses appear above the transport layer. The UPLRS incorporates the use of Packet Forward Error Correction Coding (FEC) with packet interleaving processing prior to transport. Packet FEC is an error correction coding method at the packet level to improve link transmission reliability. At the source end of the packet-switching network, the Packet FEC scheme encodes a stream of transport multimedia content packets by including redundant packets in the stream to allow for the recovery of lost packets by the Packet FEC decoder at the user end of the packet-switching network. Since lost packets appear only above the transport layer in the IP network protocol stack, Packet FEC can be viewed as a transport layer or an application layer coding method.

Universal packet loss recovery for delivery of real-time streaming multimedia content over packet-switched networks

A physical layer network coding architecture is provided to increase downlink capacity for satellite network architectures. For instance, a network coding controller may perform a XOR network coding operation on FEC encoded information received from a first terminal and second terminal, and broadcast a single downlink message containing the XOR network coded information to the first and second terminal.

Network coding for satellite communications

The Universal Packet Loss Recovery System is capable of recovering end-to-end network packet losses to obtain reliable end-to-end network delivery of multimedia streaming content over Internet Protocol (IP) networks, where packet losses appear above the transport layer. This system incorporates the use of Packet Forward Error Correction Coding (FEC) with packet interleaving processing prior to transport. Packet FEC Coding is an error correction coding method at the packet level which improves link transmission reliability. At the source end of the packet-switching network, the Packet FEC Coding scheme encodes a stream of transport multimedia content packets by including redundant packets to allow for recovery of lost packets by the Packet FEC Coding decoder at the user end of the packet-switching network. Since lost packets appear only above the transport layer in the IP network protocol stack, Packet FEC Coding can be viewed as a transport layer or application layer coding method.

Universal packet loss recovery system for delivery of real-time streaming multimedia content over packet-switched networks

According to one embodiment of the invention, a summing circuit comprises a first transmitter, a second transmitter, a first current offset circuit and a first transconductance amplifier. The first current offset circuit is coupled to the emitters of the first and second transistors. The first transconductance amplifier is coupled to the first current offset circuit.

Summing circuit for a filter

According to one embodiment of the invention, a programmable finite impulse response (FIR) filter is implemented with differential isolation circuits to isolate parasitic capacitance from attenuating an output signal at both first and second differential output terminals of the FIR filter. The FIR includes a track and hold circuit and a summing circuit that provides operational advantages to the FIR filter.

Analog finite impulse response filter

An embodiment of the present invention is a technique for timing recovery. A frequency acquisition loop locks a voltage controlled oscillator (VCO) clock of a multi-band VCO to a reference clock. The frequency acquisition loop generates first and second feedback clocks from the VCO clock. A data lock phase loop generates a driving signal corresponding to a phase error signal from interleaved partial response signal (PRS) samples based on the second feedback clock. The driving signal controls the multi-band VCO in a data phase lock mode. A lock detect controller detects a frequency lock condition in a frequency lock mode and a data lock condition in the data phase lock mode based on the first feedback clock and the reference clock.

Growing community of inventors

Palos Verdes Estates, CA, United States of America

Harry Tan